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Christopher J Gass

from Tempe, AZ
Age ~61

Christopher Gass Phones & Addresses

  • 564 Minton Dr, Tempe, AZ 85282
  • Mendham, NJ
  • Chandler, AZ
  • Saint Charles, IL
  • Maricopa, AZ

Work

Company: Reinhart Boerner Van Deuren P.C. Address:

Specialities

Intellectual Property • Patent Application • Patent Application

Professional Records

Lawyers & Attorneys

Christopher Gass Photo 1

Christopher Gass - Lawyer

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Office:
Reinhart Boerner Van Deuren P.C.
Specialties:
Intellectual Property
Patent Application
Patent Application
ISLN:
157027510
Admitted:
2002
University:
University of Illinois at Urbana-Champaign, B.S., 2002
Law School:
Chicago-Kent College of Law, J.D.

Business Records

Name / Title
Company / Classification
Phones & Addresses
Christopher Gass
President
PRESIDENTIAL ESTATES HOMEOWNERS ASSOCIATION
9442 E Riviera Dr, Scottsdale, AZ 85260
PO Box 14767, Scottsdale, AZ 85267

Publications

Us Patents

Trench Growth Techniques Using Selective Epitaxy

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US Patent:
6730606, May 4, 2004
Filed:
Nov 3, 2000
Appl. No.:
09/705274
Inventors:
Misbahul Azam - Gilbert AZ
Jeffrey Pearse - Chandler AZ
Christopher J. Gass - Tempe AZ
Assignee:
Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:
H01L 21311
US Classification:
438700, 438701, 438713, 438717
Abstract:
A masking material ( ) is formed on a foundation layer ( ) and a substrate ( ). A mask ( ) is disposed onto the masking material ( ) where a trench ( ) is desired to be formed. An etch step removes all of the masking material ( ) except at regions where the mask ( ) was formed leaving a protruding portion ( ) with an opening ( ) on either side. An epi layer ( ), is grown on the foundation layer ( ) adjacent to the protruding portion ( ) in the opening ( ). A wet oxide etch process is used to remove the protruding portion ( ) leaving a trench ( ) formed in the epi layer ( ). To complete the process, a silicon wet etch process is used to round off the corners at an edge ( ) of the trench ( ).

Method For Inhibiting Thermal Run-Away

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US Patent:
7759918, Jul 20, 2010
Filed:
Jun 16, 2006
Appl. No.:
11/424844
Inventors:
Ole P. Moyer - Chandler AZ, US
Christopher J. Gass - Tempe AZ, US
Paul J. Harriman - Goodyear AZ, US
Benjamin M. Rice - Attleboro MA, US
Michael A. Stapleton - Scottsdale AZ, US
Assignee:
Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:
G05F 1/59
G05F 1/565
US Classification:
323272, 323284
Abstract:
A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Method For Inhibiting Thermal Run-Away

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US Patent:
20100277961, Nov 4, 2010
Filed:
Jul 15, 2010
Appl. No.:
12/837382
Inventors:
OLE P. MOYER - Chandler AZ, US
Paul Jay Harriman - Belfair WA, US
Benjamin M. Rice - Cumberland RI, US
Christopher J. Gass - Tempe AZ, US
Michael A. Stapleton - Scottsdale AZ, US
International Classification:
H02M 5/293
US Classification:
363163
Abstract:
A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Method For Balancing Current

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US Patent:
20100327827, Dec 30, 2010
Filed:
Jul 19, 2010
Appl. No.:
12/838932
Inventors:
Ole P. Moyer - Chandler AZ, US
Paul Jay Harriman - Hillsboro OR, US
Benjamin M. Rice - Cumberland RI, US
Christopher J. Gass - Tempe AZ, US
Michael A. Stapleton - Scottsdale AZ, US
International Classification:
G05F 1/00
US Classification:
323272
Abstract:
A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Switched Mode Power Supply Controller Circuit And Method Thereof

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US Patent:
62855697, Sep 4, 2001
Filed:
Feb 22, 2000
Appl. No.:
9/507652
Inventors:
Jefferson W. Hall - Phoenix AZ
W. David Pace - Phoenix AZ
Christopher Gass - Tempe AZ
Assignee:
Semiconductor Components Industries LLC - Phoenix AZ
International Classification:
H02M 3335
H02M 324
H02M 542
US Classification:
363 2115
Abstract:
A switching power supply (96) receives an AC voltage and converts it to a regulated DC voltage. The switching power supply (96) includes a Vcc limiter (16) to limit the operating voltage at the power supply terminal (10) of a integrated regulator circuit (118). The Vcc limiter (16) limits the operating voltage at the power supply terminal (10). When operating voltage at power supply terminal (10) increases, a differential pair of transistors (22, 24) supply a differential current to a current mirror configuration of transistors (26, 30) to supply voltage to a drive transistor (36) to increase current in the drive transistor (36) to a value based on n times the current in a reference transistor (26). An increase in current through the drive transistor (36) counteracts increased operating voltage at the power supply terminal (10), thereby reducing the operating voltage level back to a desired level.
Christopher J Gass from Tempe, AZ, age ~61 Get Report