Christian S Krutzik

7436494, Oct 14, 2008

Feb 15, 2007

11/706724

John Kennedy - Irvine CA, US
David Ludwig - Irvine CA, US
Christian Krutzik - Costa Mesa CA, US

Irvine Sensors Corp. - Costa Mesa CA

G01C 3/08

356 401

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source such as a laser is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO shift register range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A Ttrigger signal defines the reflection time represented at each bin location by resetting appropriate circuitry to begin processing. A reference insert circuit inserts data into the FIFO registers at a preselected location to provide a reference point at which all FIFO shift register data may be aligned to accommodate for timing differences between layers and channels.

8198576, Jun 12, 2012

Oct 10, 2008

12/287691

John Kennedy - Irvine CA, US
David Ludwig - Irvine CA, US
Christian Krutzik - Costa Mesa CA, US

Aprolase Development Co., LLC - Wilmington DE

G01C 3/08

250210, 356 401

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A reference insert circuit inserts data into the FIFO registers at a preselected location to provide a reference point at which all FIFO shift register data may be aligned to accommodate for timing differences between layers and channels. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry such as a field programmable gate array to create a synchronized 3-D point cloud for creating a 3-D target image.

RE43722, Oct 9, 2012

Oct 28, 2009

12/607253

John Kennedy - Irvine CA, US
David Ludwig - Irvine CA, US
Christian Krutzik - Costa Mesa CA, US

Aprolase Development Co., LLC - Wilmington DE

G01C 3/08

356 401, 356 41, 356 501, 356 51

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source such as a laser is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO shift register range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A Ttrigger signal defines the reflection time represented at each bin location by resetting appropriate circuitry to begin processing. A reference insert circuit inserts data into the FIFO registers at a preselected location to provide a reference point at which all FIFO shift register data may be aligned to accommodate for timing differences between layers and channels.

20040188596, Sep 30, 2004

Mar 22, 2004

10/805849

David Ludwig - Irvine CA, US
John Kennedy - Irvine CA, US
Christian Krutzik - Costa Mesa CA, US

G09G005/00

250/208100

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A Ttrigger signal defines the reflection time represented by each bin location by resetting appropriate circuitry to begin processing. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry to create a 3-D point cloud for creating a 3-D target image.

20070052947, Mar 8, 2007

Mar 22, 2004

10/806037

David Ludwig - Irvine CA, US
John Kennedy - Irvine CA, US
William Kleinhans - Westlake Village CA, US
Tina Liu - Westlake Village CA, US
Christian Krutzik - Costa Mesa CA, US

G01C 3/08

356004010

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A To trigger signal defines the reflection time represented by each bin location by resetting appropriate circuitry to begin processing. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry to create a 3-D point cloud for creating a 3-D target image.

20100177277, Jul 15, 2010

Jan 8, 2010

12/684490

William Kokonaski - Gig Harbor WA, US
Yongping Wang - Philadelphia PA, US
Ronald D. Blum - Roanoke VA, US
Mark Graham - Madison Heights VA, US
Claudio Dalla Longa - Valdobbiadene-TV, IT
Sambo S. He - Riverside CA, US
Christian Krutzik - Costa Mesa CA, US

PixelOptics, Inc. - Roanoke VA

G02C 7/08
H02J 7/00

351168, 320108

Aspects of the present invention provide electronics for controlling and synchronizing operation of electro-active lenses regardless of frame type, size or style. The controlling electronics can be contained within one or more electronic modules positioned within the frame temples and can be removable and reprogrammable and can include inductive charge regions. Conductive links between electronic modules and/or between left and right sides of the electro-active spectacles can include left and right upper and lower rim portions of the frame, the bridge, conductive layers of the electro-active lenses, the upper and lower grooves of the electro-active lenses, and/or wires embedded within any portion of the frame. Aspects of the present invention also provide chargers for recharging electro-active spectacles of any size, shape or style using adjustable inductive charging cradles to inductively charge electro-active spectacles of the present invention.

20110096511, Apr 28, 2011

Oct 25, 2010

12/925620

Christian Krutzik - Costa Mesa CA, US
Sambo He - Riverside CA, US

H05K 7/00

361728

The disclosed invention comprises a substrate having one or more conductive metal traces comprising one or more electrical access leads terminating on a lateral surface of the substrate.A layer or stack of layers comprising one or more integrated circuit chips having one or more access leads in electrical connection with one or more integrated circuit bond pads on the one or more integrated circuit chips is bonded to the substrate. The surface area of the layers is less than the surface area of the substrate so as to define one or more component surface areas on the substrate. The access leads of the layers are oriented to be substantially coplanar and in vertical registration with the access leads of the substrate access leads.One or more T-connect structures between the respective access leads of the substrate and layers are defined using metalized traces for the interconnection of the integrated circuit bond pads in the layers to predetermined access leads of the substrate and/or the respective other layers.The conductive traces of the substrate are in electrical connection with the component surface area for providing one or more discrete electrical components in electrical connection with the layers in the stack to define a low-profile electronic module without the need for a top or bottom cap chip in the layer.

20120185636, Jul 19, 2012

Feb 1, 2012

13/363571

John Leon - Anaheim CA, US
W. Eric Boyd - La Mesa CA, US
Sambo He - Riverside CA, US
Christian Krutzik - Costa Mesa CA, US

ISC8, Inc. - Costa Mesa CA

G06F 12/00
G06F 12/02

711102, 711154, 711E12001, 711E12008

A high capacity, secure and tamper-resistant computer data memory device. The device uses a plurality of dedicated memory controller elements in communication with an anti-tamper module that generates a tamper response when a predetermined tamper event occurs. The tamper response may be provided as the erasure or zeroization of the contents of a memory in the devices such as erasing one or more encryption keys. The elements of the device are preferably provided in a stacked configuration with rerouted I/O pads to obfuscate the I/O and function of the devices in the stack. In one embodiment, a data transfer governance means is provided. In a further embodiment, a current negotiation means is disclosed to permit the device to request a predetermined current from a host device. In a yet further embodiment, a portable safe house computing device is provided.