Inventors:
Chingshun Cheng - Austin TX
Paul J. Roy - Round Rock TX
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G11C 2900
Abstract:
A method for testing directly addressable memory in a computer system uses address sensitive test data. When a memory error occurs, or when an initial testing of the memory indicates an error, the affected locations are retested with selected address sensitive memory test patterns. Proper address sensitive pattern selection allows all of the data bits, ECC data bits and address parity bits to be tested.