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Charles Robie Phones & Addresses

  • Fernley, NV
  • 3517 Fairchild St, La Crescenta, CA 91214
  • 5111 Boston Ave, La Crescenta, CA 91214
  • Glendale, CA
  • 8342 Kyle St, Sunland, CA 91040
  • Tujunga, CA
  • Santa Clarita, CA
  • Van Nuys, CA

Publications

Us Patents

Programmable Systolic Array System Arranged In A Found Arrangement For Passing Data Through Programmable Number Of Cells In A Time Interleaved Manner

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US Patent:
56301545, May 13, 1997
Filed:
Oct 11, 1994
Appl. No.:
8/321278
Inventors:
Gregory D. Bolstad - Orange CA
Kenneth B. Neeld - Fountain Valley CA
Charles J. Robie - Fullerton CA
John R. Staub - Corona CA
Assignee:
Hughes Aircraft Company - Los Angeles CA
International Classification:
G06F 1516
G06F 1582
US Classification:
395800
Abstract:
A linear systolic array of computation cells, each cell having several vector rotation stages. These stages are programmable to provide efficient implementation of a variety of matrix algorithms. All data movement between cells is via parameterized data packets, and the full linear systolic array is completely data flow driven at the packet level. Physical computation cells can be mapped to act as one or more logical computation cells, allowing a small array to function logically as a larger array through a logical folding. This mapping also allows defective cells to be bypassed for fault tolerance. The array can be used to compute adaptive weights in digital beamforming radar applications.

Two Dimensional Crossbar Mesh For Multi-Processor Interconnect

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US Patent:
58420347, Nov 24, 1998
Filed:
Dec 20, 1996
Appl. No.:
8/770401
Inventors:
Gregory L. Bolstad - Orange CA
Christopher W. Reed - Los Angeles CA
Charles J. Robie - Fullerton CA
Assignee:
Raytheon Company - Lexington MA
International Classification:
G06F 1300
US Classification:
39580011
Abstract:
A parallel processor array with a two-dimensional crossbar switch architecture. Individual processing elements are configured as clusters of processors, wherein the individual processing elements within each cluster are interconnected by a two dimensional cluster network of crossbar switch elements. The clusters are interconnected via a two dimensional array network of crossbar switch elements, supporting high-bandwidth inter-processor data shuffles that characterize parallel implementations of sensor processing problems. Input data is supplied directly into the array network of crossbar switch elements, which allows an optimal initial partitioning of the data set among the processing elements. The array architecture supports a virtual array sizing, where the processor array can be treated as a variable sized array with dimensions that are software controllable, selectable to match system characteristics.
Charles Michael Robie from Fernley, NV, age ~67 Get Report