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Chad Slaugh Phones & Addresses

  • 3865 Teakwood Pl, Colorado Springs, CO 80918 (719) 593-7667
  • Colorado Spgs, CO
  • Jensen, UT
  • 3865 Teakwood Pl, Colorado Spgs, CO 80918 (719) 237-2262

Work

Company: Keysight technologies Aug 1, 2014 Position: Software engineer and architect

Education

Degree: Bachelors, Bachelor of Science School / High School: Utah State University 2014 to 2015

Skills

Software Development • Testing • Debugging • Embedded Software • Process Improvement • Electronics • C • Linux • Program Management • C++ • Software Design • Systems Engineering • Fpga • Leadership • Clearcase • Embedded Systems • Microsoft Office

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Chad Slaugh Photo 1

Software Engineer And Architect

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Location:
Colorado Springs, CO
Industry:
Electrical/Electronic Manufacturing
Work:
Keysight Technologies
Software Engineer and Architect

Agilent Technologies Nov 1999 - Jul 2014
Software Engineer

Hewlett-Packard Jun 1986 - Oct 1999
Manufacturing Engineer and Software Engineer
Education:
Utah State University 2014 - 2015
Bachelors, Bachelor of Science
Utah State University 1982 - 1986
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Software Development
Testing
Debugging
Embedded Software
Process Improvement
Electronics
C
Linux
Program Management
C++
Software Design
Systems Engineering
Fpga
Leadership
Clearcase
Embedded Systems
Microsoft Office

Publications

Us Patents

System And Method For Allocating Logic Analyzer Hardware Resources

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US Patent:
6789217, Sep 7, 2004
Filed:
Apr 10, 2001
Appl. No.:
09/832599
Inventors:
Chad H Slaugh - Colorado Springs CO
Jeffrey John Haeffele - Monument CO
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
G06F 1100
US Classification:
714 39, 714 46
Abstract:
Systems and methodologies for use in signal measurement systems that acquire and store signal data in accordance with a trigger specification. In particular, the present invention is directed to a hardware resource allocator that is interposed between the signal acquisition hardware of a logic analyzer and the user interface on which a signal measurement specification model is presented to the operator. The hardware resource allocator translates the measurement requirements as specified by the user on the user interface to commands for allocation and control of the appropriate combination of hardware resources. Generally, the hardware resource allocator allocates and configures the requisite hardware resources and translates the measurement specification to hardware control data used by software drivers to program the signal acquisition hardware resources. Importantly, the hardware resource allocator separates the logic analyzer hardware from the trace measurement specification model presented to the operator on the user interface. The hardware resource allocator translates the measurement requirements provided by the user interface model to the appropriate combinations of commands and data appropriate for the signal acquisition hardware architecture.
Chad H Slaugh from Colorado Springs, CO, age ~62 Get Report