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Carmen Adriana Maxim

from Saratoga, CA
Age ~52
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Also known as:
Carmen A Maxim, Carmen Te Maxim, Carmenadriana Maxim, Charmen A Maxim
Related to:
Adrian Maxim, 56Nell Maxim, 93Adrian Maxik, 56
Connected to:
Beau R Maxim, 43Christine E Maxim, 52Cristian Maxim, 47Debbie Maxim, 62Diane E Maxim, 89Lucian Maxim, 41Mihai A Maxim, 41Miriam Maxim, 42Roger M Maxim, 56

Carmen Maxim Phones & Addresses

  • Saratoga, CA
  • San Jose, CA
  • Milpitas, CA
  • 4201 Monterey Oaks Blvd, Austin, TX 78749 (512) 899-0288
  • 8713 Cobblestone, Austin, TX 78735 (512) 899-0288
  • 3151 Summercreek Dr, San Jose, CA 95136 (512) 899-0288

Publications

Us Patents

Work In Progress Management Program Interface

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US Patent:
6845280, Jan 18, 2005
Filed:
Nov 26, 2002
Appl. No.:
10/305470
Inventors:
Noel Curtis Rives - Austin TX, US
Donald Craig Likes - Austin TX, US
Carmen Adriana Maxim - Austin TX, US
Marwane Jawad Yazback - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 1900
US Classification:
700121, 700108, 700109
Abstract:
An interface for a semiconductor fabrication facility which includes a real time dispatch system providing near real time information regarding processing of semiconductor wafers and a middleware component. The interface includes a work in progress application program interface coupled between the fabrication facility and the middleware component. The work in progress application program interface provides a common interface for communicating between the fabrication facility and the middleware component.

Integrated Enterprise Resource Planning And Manufacturing System

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US Patent:
6846684, Jan 25, 2005
Filed:
Dec 11, 2002
Appl. No.:
10/316730
Inventors:
Marwane Jawad Yazback - Austin TX, US
Noel Curtis Rives - Austin TX, US
Carmen Adriana Maxim - Austin TX, US
Donald Craig Likes - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 2166
US Classification:
438 14
Abstract:
An integrated enterprise resource planning and manufacturing system which includes a middleware component, a fabrication facility coupled to the middleware component, a real time dispatcher application program interface coupled between the fabrication facility and the middleware component, a work in progress application program interface coupled between the fabrication facility and the middleware component, and an enterprise resource planning system coupled to the middleware component. The fabrication facility includes a manufacturing execution system and a real time dispatch system. The manufacturing execution system tracks overall processing of semiconductor wafers. The real time dispatch system provides near real time information regarding processing of semiconductor wafers. The real time dispatcher application program interfaces publishing information to the middleware component. The work in progress application program interface provides an interface for communicating to the fabrication facility from the middleware component.

Real Time Dispatcher Application Program Interface

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US Patent:
6871113, Mar 22, 2005
Filed:
Nov 26, 2002
Appl. No.:
10/304413
Inventors:
Carmen Adriana Maxim - Austin TX, US
Donald Craig Likes - Austin TX, US
Noel Curtis Rives - Austin TX, US
Marwane Jawad Yazback - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F019/00
US Classification:
700121, 700108, 700109
Abstract:
An interface for a semiconductor fabrication facility which includes a real time dispatch system that provides near real time information regarding processing of semiconductor wafers and a middleware component. The interface includes a real time dispatcher application program interface coupled between the fabrication facility and the middleware component. The real time dispatcher application program interface provides a common interface which provides information to the middleware component.

Web Based Semiconductor Ordering Architecture

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US Patent:
7613534, Nov 3, 2009
Filed:
Dec 11, 2002
Appl. No.:
10/316815
Inventors:
Marwane Jawad Yazback - Austin TX, US
Noel Curtis Rives - Austin TX, US
Carmen Adriana Maxim - Austin TX, US
Donald Craig Likes - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 19/00
US Classification:
700 96, 700121
Abstract:
A semiconductor fabrication architecture which includes a middleware component, a fabrication facility coupled to the middleware component, a real time dispatcher application program interface coupled between the fabrication facility and the middleware component, a work in progress application program interface coupled between the fabrication facility and the middleware component, an enterprise resource planning system coupled to the middleware component, and an order processing system coupled to the middleware component. The fabrication facility includes a manufacturing execution system and a real time dispatch system. The manufacturing execution system tracks overall processing of semiconductor wafers. The real time dispatch system provides near real time information regarding processing of semiconductor wafers. The real time dispatcher application program interfaces publishing information to the middleware component.

Method And Apparatus For Routing Wafer Pods To Allow Parallel Processing

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US Patent:
8275478, Sep 25, 2012
Filed:
Mar 13, 2009
Appl. No.:
12/403632
Inventors:
Raymond G. Goss - Austin TX, US
Carmen A. Maxim - Austin TX, US
Jan Rothe - Dresden, DE
Assignee:
Globalfoundries Inc. - Grand Cayman
International Classification:
G06F 19/00
US Classification:
700112, 700117, 414217
Abstract:
A method includes designating a plurality of wafers as members of a group. A first subset of the wafers is housed in a first wafer pod and a second subset of the wafers is housed in a second wafer pod. The first wafer pod is routed to a first tool, and at least a first operation is performed on the wafers in the first subset using the first tool. The second wafer pod is routed to a second tool, and the first operation is performed on the wafers in the second subset using the second tool. The wafers in the first and second subsets are consolidated following the performing of the first operation.

Method And Apparatus For Scheduling Material Transport In A Semiconductor Manufacturing Facility

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US Patent:
20080125900, May 29, 2008
Filed:
Sep 15, 2006
Appl. No.:
11/532278
Inventors:
Carmen A. Maxim - Austin TX, US
Achim Felber - San Leanna TX, US
International Classification:
G06F 19/00
US Classification:
700113
Abstract:
The present invention provides a method, an apparatus, and a semiconductor manufacturing facility. The method includes receiving a request to move material from a first location to a second location in the semiconductor manufacturing facility, accessing information indicative of a duration of the move from the first location to the second location, and scheduling the requested move based on the information indicative of the duration of the move.

Fabrication Architecture Including Enterprise Resource Planning Integration

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US Patent:
6839601, Jan 4, 2005
Filed:
Nov 26, 2002
Appl. No.:
10/305038
Inventors:
Marwane Jawad Yazback - Austin TX, US
Noel Curtis Rives - Austin TX, US
Carmen Adriana Maxim - Austin TX, US
Donald Craig Likes - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 1900
US Classification:
700 97, 700121
Abstract:
A semiconductor fabrication facility architecture which includes a fabrication facility, a middleware component, a real time dispatcher application program interface coupled between the fabrication facility and the middleware component, and a work in progress application program interface coupled between the fabrication facility and the middleware component. The fabrication facility includes a manufacturing execution system and a real time dispatch system. The manufacturing execution system tracks overall processing of semiconductor wafers and the real time dispatch system provides near real time information regarding processing of semiconductor wafers. The real time dispatcher application program interface provides a common interface for providing information to the middleware component. The work in progress application program interface provides a common interface for communicating to the fabrication facility from the middleware component.

Patching Deployed Deep Neural Networks For Autonomous Machine Applications

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US Patent:
20220244727, Aug 4, 2022
Filed:
Feb 1, 2021
Appl. No.:
17/164362
Inventors:
- Santa Clara CA, US
Urs Muller - Keyport NJ, US
Beat Flepp - Atlantic Highlands NJ, US
Carmen Adriana Maxim - Saratoga CA, US
Marco Scoffier - Brooklyn NY, US
International Classification:
G05D 1/00
G06N 3/04
G06N 3/08
G05B 13/02
Abstract:
In various examples, rapid resolution of deep neural network (DNN) failure modes may be achieved by deploying patch neural networks (PNNs) trained to operate effectively on the failure modes of the DNN. The PNNs may operate on the same or additional data as the DNN, and may generate new signals in addition to those generated using the DNN that address the failure modes of the DNN. A fusion mechanism may be employed to determine which output to rely on for a given instance of the DNN/PNN combination. As a result, failure modes of the DNN may be addressed in a timely manner that requires minimal deactivation or downtime for the DNN, a feature controlled using the DNN, and/or semi-autonomous or autonomous functionality as a whole.
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Carmen Adriana Maxim from Saratoga, CA, age ~52 Get Report