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Bruno Tamara T Amizic

from Irvine, CA
Age ~48

Bruno Amizic Phones & Addresses

  • 21 Winterbranch, Irvine, CA 92604
  • 1316 W Fillmore St APT B, Chicago, IL 60607 (312) 421-6369
  • 1417 Fillmore St, Chicago, IL 60607
  • 1417 W Fillmore St #3E, Chicago, IL 60607
  • Evanston, IL
  • Rolla, MO
  • Philadelphia, PA
  • Washington, DC

Work

Company: Northwestern university 2003 Position: Ph.d. candidate

Education

Degree: PhD. School / High School: Northwestern University 2003 to 2011 Specialities: Digital Image Processing

Skills

Signal Processing • Image Processing • C • Machine Learning • Matlab • Algorithms • Embedded Systems • Simulations • Software Engineering • Artificial Intelligence • Computer Vision • Digital Image Processing • Information Security • Threat Modeling • Threat Analysis • Threat and Vulnerability Management • Security Information and Event Management • Integration • Software Development Life Cycle • Telecommunications • Technical Leadership • Application Security • Mobile Security

Languages

English

Ranks

Certificate: Giac Penetration Tester (Gpen)

Industries

Accounting

Resumes

Resumes

Bruno Amizic Photo 1

Research Engineer

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Location:
21 Winterbranch, Irvine, CA 92604
Industry:
Accounting
Work:
Northwestern University since 2003
Ph.D. candidate

MOT Sep 2005 - May 2011
Sr. Electrical Engineer

Zenith Electronics Corp. May 2002 - Aug 2005
Engineer II
Education:
Northwestern University 2003 - 2011
PhD., Digital Image Processing
University of Missouri-Rolla 2000 - 2002
M.S., Digital Communications
University of Missouri-Rolla 1996 - 1999
B.S., Digital Communications
Skills:
Signal Processing
Image Processing
C
Machine Learning
Matlab
Algorithms
Embedded Systems
Simulations
Software Engineering
Artificial Intelligence
Computer Vision
Digital Image Processing
Information Security
Threat Modeling
Threat Analysis
Threat and Vulnerability Management
Security Information and Event Management
Integration
Software Development Life Cycle
Telecommunications
Technical Leadership
Application Security
Mobile Security
Languages:
English
Certifications:
Giac Penetration Tester (Gpen)
Giac Web Application Penetration Tester (Gwapt)
Giac Mobile Device Security Analyst (Gmob)
Giac Exploit Researcher and Advanced Penetration Tester (Gxpn)
Giac Advisory Board
Certified Information Systems Security Professional (Cissp)

Publications

Us Patents

Closed Loop Power Normalized Timing Recovery For 8 Vsb Modulated Signals

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US Patent:
8189724, May 29, 2012
Filed:
Oct 26, 2005
Appl. No.:
11/258700
Inventors:
Bruno Amizic - Chicago IL, US
Tyler Brown - Mundelein IL, US
Assignee:
Zenith Electronics LLC - Lincolnshire IL
International Classification:
H04L 7/00
US Classification:
375355, 375295, 375224, 375345, 375326, 375294, 348536, 348607
Abstract:
A timing recovery loop includes a sampler, a narrow band filter, an RMS normalizer, a timing error detector, and a sample controller. The sampler samples a received signal. The narrow band filter filters the sampled received signal so as to pass an upper band edge of the received signal and not a lower band edge of the received signal. The RMS normalizer sets an average power level of an output of the filter to a substantially constant value. The timing error detector detects a timing error with respect to an output of the RMS normalizer. The sample controller controls the sampler in response to the detected timing error.

Closed Loop Power Normalized Timing Recovery For 8 Vsb Modulated Signals

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US Patent:
8315345, Nov 20, 2012
Filed:
Nov 1, 2010
Appl. No.:
12/916977
Inventors:
Bruno Amizic - Chicago IL, US
Tyler Brown - Mundelein IL, US
Assignee:
Zenith Electronics LLC - Lincolnshire IL
International Classification:
H04L 7/00
US Classification:
375355, 375224, 375345, 375267, 375295, 375148, 455101, 455455, 455423, 455 69
Abstract:
A timing recovery loop includes a sampler, a narrow band filter, an RMS normalize, a timing error detector, and a sample controller. The sampler samples a received signal. The narrow band filter filters the sampled received signal so as to pass an upper band edge of the received signal and not a lower band edge of the received signal. The RMS normalize sets an average power level of an output of the filter to a substantially constant value. The timing error detector detects a timing error with respect to an output of the RMS normalize. The sample controller controls the sampler in response to the detected timing error.

Channel Impulse Response Estimating Decision Feedback Equalizer

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US Patent:
8320442, Nov 27, 2012
Filed:
Aug 4, 2004
Appl. No.:
10/911282
Inventors:
Bruno Amizic - Chicago IL, US
Mark Fimoff - Hoffman Estates IL, US
Jin Kim - Lake Zurich IL, US
Sreenivasa M. Nerayanuru - Wheeling IL, US
Assignee:
Zenith Electronics LLC - Lincolnshire IL
International Classification:
H03H 7/30
US Classification:
375233, 375341, 375265
Abstract:
A decision feedback equalizer is operated by making first symbol decisions from an output of the decision feedback equalizer such that the first symbol decisions are characterized by a relatively long processing delay, by making second symbol decisions from the output of the decision feedback equalizer such that the second symbol decisions are characterized by a relatively short processing delay, and by determining tap weights for the decision feedback equalizer based on the first and second symbol decisions. The first symbol decisions may be derived from the output of a long traceback trellis decoder. The second symbol decisions may be derived either from the output of a short traceback trellis decoder or from shorter delay outputs of the long traceback trellis decoder.

Closed Loop Power Normalized Timing Recovery For 8 Vsb Modulated Signals

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US Patent:
8542778, Sep 24, 2013
Filed:
Oct 26, 2005
Appl. No.:
11/258735
Inventors:
Bruno Amizic - Chicago IL, US
Tyler Brown - Mundelein IL, US
Assignee:
Zenith Electronics LLC - Lincolnshire IL
International Classification:
H04L 27/14
US Classification:
375326, 375267, 375295, 375148, 455423, 455101, 455455
Abstract:
A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.

Cir Estimating Decision Feedback Equalizer With Phase Tracker

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US Patent:
20060239342, Oct 26, 2006
Filed:
Apr 26, 2005
Appl. No.:
11/114573
Inventors:
Bruno Amizic - Chicago IL, US
Mark Fimoff - Hoffman Estates IL, US
Sreenivasa Nerayanuru - Wheeling IL, US
International Classification:
H03H 7/40
H03K 5/159
US Classification:
375233000, 375350000
Abstract:
An equalizer system includes an equalizer, first and second decoders, and a tap weight controller. The equalizer equalizes a received signal to provide an equalizer output. The first decoder is characterized by a first parallel output, and the first decoder decodes the equalizer output to provide first symbol decisions having a first accuracy. The second decoder is characterized by a second parallel output, the second decoder receives the first parallel output and decodes the equalizer output to provide second symbol decisions having a second accuracy, the first accuracy is greater than the second accuracy, and the second decoder applies the second parallel output to the equalizer. The tap weight controller determines tap weights based on the first symbol decisions and supplies the tap weights to the equalizer.

Closed Loop Power Normalized Timing Recovery For 8 Vsb Modulated Signals

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US Patent:
20090225820, Sep 10, 2009
Filed:
Apr 21, 2009
Appl. No.:
12/427387
Inventors:
Bruno Amizic - Chicago IL, US
Tyler Brown - Mundelein IL, US
International Classification:
H04B 17/00
US Classification:
375224
Abstract:
A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.
Bruno Tamara T Amizic from Irvine, CA, age ~48 Get Report