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Brett Arnold Dunlap

from Queen Creek, AZ
Age ~57
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Also known as:
Brett A Dunlap, Dunlap Brett
Phone and address:
3923 Bellerive Dr, Queen Creek, AZ 85142
(480) 699-9093
Related to:
Vartina Jones, 46Angel DunlapWilly J WillyAngelique Jones, 55
Connected to:
Aaron Dunlap, 42Adrian R Dunlap, 37Ahmad D Dunlap, 29Alfred T Dunlap, 74Angeline G Dunlap, 82Arlene B Dunlap, 67Arthur L Dunlap, 66Austin B Dunlap, 39Brendan Dunlap, 27Bristyn Dunlap, 33

Brett Dunlap Phones & Addresses

  • 3923 Bellerive Dr, Queen Creek, AZ 85142 (480) 699-9093
  • Gilbert, AZ
  • Hot Springs National Park, AR
  • 1807 Shawnee Dr, Chandler, AZ 85224 (480) 726-9763
  • 281 Carriage Ln, Chandler, AZ 85224 (480) 699-9093 (480) 633-0936
  • Phoenix, AZ
  • Tucson, AZ
  • Clarendon, TX
  • Maricopa, AZ
  • 3272 E Orchid Ln, Gilbert, AZ 85296 (480) 699-9093

Work

Position: Craftsman/Blue Collar

Education

Degree: High school graduate or higher

Resumes

Resumes

Brett Dunlap Photo 1

Us Army Civil Affairs

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Work:

Us Army Civil Affairs
Education:
Temple University
Brett Dunlap Photo 2

Guest Services Manager

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Work:

Guest Services Manager
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Brett Dunlap

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Brett Dunlap Photo 4

Brett Dunlap

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Location:
United States

Publications

Us Patents

Shielded Embedded Electronic Component Substrate Fabrication Method And Structure

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US Patent:
8432022, Apr 30, 2013
Filed:
Sep 29, 2009
Appl. No.:
12/569300
Inventors:
Ronald Patrick Huemoeller - Gilbert AZ, US
Brett Dunlap - Queen Creek AZ, US
David Jon Hiner - Chandler AZ, US
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 23/552
H01L 21/70
US Classification:
257659, 257508, 257E21001, 257728, 257704, 257660
Abstract:
A shielded embedded electronic component substrate includes a core dielectric layer having a die opening. An electrically conductive die shield lines the die opening. An electronic component is mounted within the die opening and to the die shield, where the die shield shields the electronic component. By mounting the electronic component within the die opening, the shielded embedded electronic component substrate is made relatively thin. Further, heat generated by the electronic component is dissipated to the die shield and to the ambient environment. Accordingly, the shielded embedded electronic component substrate is well suited for use when the electronic component generates a significant amount of heat, e. g. , in high power applications.

Light Emitting Diode (Led) Package And Method

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US Patent:
8535961, Sep 17, 2013
Filed:
Dec 9, 2010
Appl. No.:
12/964397
Inventors:
Bob Shih-Wei Kuo - Chandler AZ, US
Brett Arnold Dunlap - Queen Creek AZ, US
David Bolognia - Scottsdale AZ, US
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 21/00
US Classification:
438 28, 257 88, 257E33059
Abstract:
A method of forming a light emitting diode (LED) package includes mounting a LED structure to a carrier, overmolding the LED structure in a package body, backgrinding the package body to expose the LED structure, removing the carrier, and forming a redistribution layer (RDL) buildup structure comprising a RDL circuit pattern coupled to a LED of the LED structure. The LED package is formed without a substrate in one embodiment. By forming the LED package without a substrate, the thickness of the LED package is minimized. Further, by forming the LED package without a substrate, heat removal from the LED is maximized as is electrical performance. Further still, by forming the LED package without a substrate, the fabrication cost of the LED package is minimized.

Mechanical Tape Separation Package And Method

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US Patent:
8337657, Dec 25, 2012
Filed:
Oct 27, 2010
Appl. No.:
12/913325
Inventors:
Brett Arnold Dunlap - Queen Creek AZ, US
Robert Francis Darveaux - Gilbert AZ, US
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
B29C 65/50
B32B 37/26
B32B 38/10
US Classification:
156247, 156701, 156714, 156718
Abstract:
A method of fabricating a plurality of electronic component packages includes coupling a tape to a panel. Electronic components are coupled to the tape and encapsulated to form a molded wafer. The molded wafer is mechanically separated from the panel without heating by breaking a mechanical separation adhesive of the tape. By mechanically separating the molded wafer from the panel without heating, warpage of the molded wafer associated with heating is avoided.

Packaging For Fingerprint Sensors And Methods Of Manufacture

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US Patent:
20200365480, Nov 19, 2020
Filed:
Apr 24, 2020
Appl. No.:
16/857907
Inventors:
- Tempe AZ, US
David Bolognia - Scottsdale AZ, US
Robert Francis Darveaux - Gilbert AZ, US
Brett Arnold Dunlap - Queen Creek AZ, US
International Classification:
H01L 23/31
H01L 21/56
G06K 9/00
H01L 23/00
Abstract:
A fingerprint sensor package, including a sensing side for sensing fingerprint information and a separate connection side for electrically connecting the fingerprint sensor package to a host device, is disclosed. The fingerprint sensor package can also include a sensor integrated circuit facing the sensing side and substantially surrounded by a fill material. The fill material includes vias at peripheral locations around the sensor integrated circuit. The fingerprint sensor package can further include a redistribution layer on the sensing side which redistributes connections of the sensor integrated circuit to the vias. The connections can further be directed through the vias to a ball grid array on the connection side. Some aspects also include electrostatic discharge traces positioned at least partially around a perimeter of the connection side. Methods of manufacturing are also disclosed.

Method Of Forming A Plurality Of Electronic Component Packages And Packages Formed Thereby

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US Patent:
20200335476, Oct 22, 2020
Filed:
Jan 28, 2020
Appl. No.:
16/774432
Inventors:
- Tempe AZ, US
Brett Arnold Dunlap - Queen Creek AZ, US
International Classification:
H01L 23/00
H01L 21/48
H01L 21/56
H01L 21/78
Abstract:
A method of forming a plurality of electronic component packages includes attaching electronic components to a carrier, wherein high aspect ratio spaces exist between the electronic components. A dielectric sheet is laminated around the electronic components thus filling the spaces and forming a package body. The spaces are completely and reliably filled by the dielectric sheet and thus the package body has an absence of voids. Further, an upper surface of the package body is planar, i.e., has an absence of ripples or other non-uniformities. Further, lamination of the dielectric sheet is performed with a low cost lamination system.

Packaging For Fingerprint Sensors And Methods Of Manufacture

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US Patent:
20180090409, Mar 29, 2018
Filed:
Sep 5, 2017
Appl. No.:
15/695478
Inventors:
- Tempe AZ, US
David Bolognia - Scottsdale AZ, US
Robert Francis Darveaux - Gilbert AZ, US
Brett Arnold Dunlap - Queen Creek AZ, US
International Classification:
H01L 23/31
H01L 23/00
G06K 9/00
H01L 21/56
Abstract:
A fingerprint sensor package, including a sensing side for sensing fingerprint information and a separate connection side for electrically connecting the fingerprint sensor package to a host device, is disclosed. The fingerprint sensor package can also include a sensor integrated circuit facing the sensing side and substantially surrounded by a fill material. The fill material includes vias at peripheral locations around the sensor integrated circuit. The fingerprint sensor package can further include a redistribution layer on the sensing side which redistributes connections of the sensor integrated circuit to the vias. The connections can further be directed through the vias to a ball grid array on the connection side. Some aspects also include electrostatic discharge traces positioned at least partially around a perimeter of the connection side. Methods of manufacturing are also disclosed.

Method Of Forming A Plurality Of Electronic Component Packages

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US Patent:
20170294405, Oct 12, 2017
Filed:
Jun 27, 2017
Appl. No.:
15/634861
Inventors:
- Tempe AZ, US
Brett Arnold Dunlap - Queen Creek AZ, US
International Classification:
H01L 23/00
H01L 21/78
H01L 21/48
H01L 21/56
Abstract:
A method of forming a plurality of electronic component packages includes attaching electronic components to a carrier, wherein high aspect ratio spaces exist between the electronic components. A dielectric sheet is laminated around the electronic components thus filling the spaces and forming a package body. The spaces are completely and reliably filled by the dielectric sheet and thus the package body has an absence of voids. Further, an upper surface of the package body is planar, i.e., has an absence of ripples or other non-uniformities. Further, lamination of the dielectric sheet is performed with a low cost lamination system.

Edge-Effect Mitigation For Capacitive Sensors

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US Patent:
20170177113, Jun 22, 2017
Filed:
Sep 30, 2016
Appl. No.:
15/282494
Inventors:
- San Jose CA, US
Ozan Ersan Erdogan - San Jose CA, US
Shengmin Wen - Phoenix AZ, US
Brett Dunlap - Phoenix AZ, US
International Classification:
G06F 3/044
G06F 3/041
Abstract:
An input device for capacitive sensing includes: a plurality of sensor electrodes, the plurality of sensor electrodes comprising a plurality of transmitter electrodes and a plurality of receiver electrodes, wherein the plurality of transmitter electrodes is configured to be driven by sensing signals and the plurality of receiver electrodes is configured to receive detected signals corresponding to respective sensing signals driven onto the plurality of transmitter electrodes; a plurality of transmitter electrode vias, wherein each transmitter electrode via corresponds to a respective transmitter electrode of the plurality of transmitter electrodes; and conductive shielding, configured to mitigate effects of the plurality of transmitter electrode vias on the detected signals received on one or more receiver electrodes of the plurality of receiver electrodes, wherein the conductive shielding comprises: a first portion disposed above the plurality of transmitter electrode vias; and a second portion disposed outside the plurality of transmitter electrode vias.
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Brett Arnold Dunlap from Queen Creek, AZ, age ~57 Get Report