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Brannon J Batson

from Brooklyn, NY
Age ~48
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Also known as:
Jeff Batson Brannon
Phone and address:
55 Poplar St APT 3B, Brooklyn, NY 11201
(718) 522-7985
Related to:
Michele M Brinson, 62
Connected to:
Allen R Batson, 67Barbara A Batson, 75Ceward W Batson, 77Danny G Batson, 73Devon Batson, 32Elena M Batson, 40Evan S Batson, 41Fernandez L Batson, 35Gina M Batson, 53Jamy C Batson, 67

Brannon Batson Phones & Addresses

  • 55 Poplar St APT 3B, Brooklyn, NY 11201 (718) 522-7985
  • 36 Clark St, Brooklyn, NY 11201 (718) 522-7985
  • Olive Branch, MS
  • Boston, MA
  • Santa Cruz, CA
  • San Mateo, CA
  • Horn Lake, MS
  • Charlestown, IN
  • West Lafayette, IN

Work

Company: D. e. shaw research Apr 2005 Position: Hardware design and engineering

Education

Degree: Masters, Master of Science In Electrical Engineering School / High School: Purdue University 1998 to 2000 Specialities: Architecture

Skills

Mpi • Perl • Linux • Programming • Rtl Design • Algorithms • Mathematical Modeling • Simulations • High Performance Computing • Asic • Compilers • Scientific Computing • Distributed Systems • System Architecture • Computer Science • Software Engineering • C++ • Verilog • Systemverilog • Parallel Programming • C • Matlab • Parallel Computing • Microprocessors • Soc • Computer Architecture • Unix • Optimization • Numerical Analysis • Mathematica • Machine Learning • Software Development • Java • Eda • Vhdl • Debugging • Physics • Embedded Systems • Python • Fpga

Industries

Computer Hardware

Resumes

Resumes

Brannon Batson Photo 1

Hardware Design And Engineering

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Location:
New York, NY
Industry:
Computer Hardware
Work:
D. E. Shaw Research
Hardware Design and Engineering
Intel Corporation 2001 - 2005
Computer Engineer
Opelin 2000 - 2001
Engineer
Education:
Purdue University 1998 - 2000
Masters, Master of Science In Electrical Engineering, Architecture Purdue University 1994 - 1998
Skills:
Mpi
Perl
Linux
Programming
Rtl Design
Algorithms
Mathematical Modeling
Simulations
High Performance Computing
Asic
Compilers
Scientific Computing
Distributed Systems
System Architecture
Computer Science
Software Engineering
C++
Verilog
Systemverilog
Parallel Programming
C
Matlab
Parallel Computing
Microprocessors
Soc
Computer Architecture
Unix
Optimization
Numerical Analysis
Mathematica
Machine Learning
Software Development
Java
Eda
Vhdl
Debugging
Physics
Embedded Systems
Python
Fpga

Publications

Us Patents

Two-Hop Source Snoop Based Messaging Protocol

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US Patent:
7512741, Mar 31, 2009
Filed:
Jan 13, 2006
Appl. No.:
11/332028
Inventors:
Brannon Batson - Brooklyn NY, US
Benjamin Tsien - Fremont CA, US
William A. Welch - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
H04L 12/00
US Classification:
711141, 711145, 711146, 370329, 370409, 370431, 370432, 709203
Abstract:
A messaging protocol that facilitates a distributed cache coherency conflict resolution in a multi-node system that resolves conflicts at a home node. The protocol may perform a method including supporting at least three protocol classes for the messaging protocol, via at least three virtual channels provided by a link layer of a network fabric coupled to the caching agents, wherein the virtual channels include a first virtual channel to support a probe message class, a second virtual channel to support an acknowledgment message class, and a third virtual channel to support a response message class.

Two-Hop Source Snoop Based Cache Coherence Protocol

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US Patent:
7543115, Jun 2, 2009
Filed:
Jan 13, 2006
Appl. No.:
11/332057
Inventors:
Brannon Batson - Brooklyn NY, US
Benjamin Tsien - Fremont CA, US
William A. Welch - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
US Classification:
711141, 711140, 711145, 711146
Abstract:
A method for cache coherency in a network of a plurality of caching agents includes storing a plurality of miss requests, transmitting the miss requests into the network, sending a probe message on a probe channel and a request message on a second channel from one of the plurality of caching agents, and maintaining an open status for the miss request until the requesting cache agent receives the data or an ownership indicator.

System And Method For A 3-Hop Cache Coherency Protocol

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US Patent:
7836144, Nov 16, 2010
Filed:
Dec 29, 2006
Appl. No.:
11/647618
Inventors:
Phanindra K. Mannava - Folsom CA, US
Robert H. Beers - Beaverton OR, US
Seungjoon Park - Los Altos CA, US
Brannon Batson - Brooklyn NY, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 15/167
US Classification:
709213, 709214, 709202
Abstract:
A system and method for implementing a cache coherency protocol are described. The system includes a first caching agent to send a first cache request to a home agent. The system also includes the home agent including a queue to store the first cache request.

Two-Hop Source Snoop Based Messaging Protocol

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US Patent:
8255636, Aug 28, 2012
Filed:
Feb 13, 2009
Appl. No.:
12/370813
Inventors:
Brannon J. Batson - Brooklyn NY, US
Benjamin Tsien - San Jose CA, US
William A. Welch - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
H04L 12/00
US Classification:
711141, 711145, 370329, 370409, 709209
Abstract:
A messaging protocol that facilitates a distributed cache coherency conflict resolution in a multi-node system that resolves conflicts at a home node. The protocol may perform a method including supporting at least three protocol classes for the messaging protocol, via at least three virtual channels provided by a link layer of a network fabric coupled to the caching agents, wherein the virtual channels include a first virtual channel to support a probe message class, a second virtual channel to support an acknowledgment message class, and a third virtual channel to support a response message class.

Cache Coherence Protocol

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US Patent:
20050240734, Oct 27, 2005
Filed:
Apr 27, 2004
Appl. No.:
10/833977
Inventors:
Brannon Batson - Santa Cruz CA, US
Ling Cen - Austin TX, US
William Welch - San Jose CA, US
Herbert Hum - Portland OR, US
Seungjoon Park - Los Altos CA, US
International Classification:
G06F012/00
US Classification:
711141000, 711145000
Abstract:
A cache coherence protocol facilitates a distributed cache coherency conflict resolution in a multi-node system to resolve conflicts at a home node.

Messaging Protocol

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US Patent:
20050262250, Nov 24, 2005
Filed:
Apr 27, 2004
Appl. No.:
10/833965
Inventors:
Brannon Batson - Santa Cruz CA, US
Ling Cen - Austin TX, US
William Welch - San Jose CA, US
Herbert Hum - Portland OR, US
Seungjoon Park - Los Altos CA, US
International Classification:
G06F015/16
US Classification:
709230000
Abstract:
The invention facilitates a messaging protocol in a multi-node system to resolve conflicts at a home node.

Method And Apparatus For Initiating Cpu Data Prefetches By An External Agent

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US Patent:
20060085602, Apr 20, 2006
Filed:
Oct 15, 2004
Appl. No.:
10/966231
Inventors:
Ramakrishna Huggahalli - Portland OR, US
Brannon Batson - Boston MA, US
Raymond Tetrick - Portland OR, US
Robert Blankenship - Tacoma WA, US
International Classification:
G06F 12/00
US Classification:
711137000
Abstract:
An arrangement is provided for an external agent to initiate data prefetches from a system memory to a cache associated with a target processor, which needs the data to execute a program, in a computing system. When the external agent has data, it may create and issue a prefetch directive. The prefetch directive may be sent along with system interconnection transactions or sent as a separate transaction to devices including the target processor in the system. When receiving and recognizing the prefetch directive, a hardware prefetcher associated with the target processor may issue a request to the system memory to prefetch data to the cache. The target processor can access data in the cache more efficiently than it accesses data in the system memory. Some pre-processing may also be associated with the data prefetch.

Suppressing Interaction Between Bonded Particles

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US Patent:
20200005904, Jan 2, 2020
Filed:
Sep 10, 2019
Appl. No.:
16/566041
Inventors:
- New York NY, US
Brannon Batson - Brooklyn NY, US
Ron Dror - Stanford CA, US
International Classification:
G16C 10/00
Abstract:
A method for managing flow of particles into an array of pairwise-point-interaction-module includes receiving a first set of particles into a first queue. The first set is a proper subset of a second set of particles that comprises all particles that are to be passed into an array of pairwise-point-interaction-modules during a current time period. Prior to having received all particles from the second set, particles from the first set are allowed to pass from the first queue into the array.
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Brannon J Batson from Brooklyn, NY, age ~48 Get Report