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Bogdan Simion Phones & Addresses

  • Mesa, AZ
  • Phoenix, AZ
  • 5922 Kay Dr, Norcross, GA 30093 (678) 580-3466 (770) 840-0543
  • 5922 Kay Dr #A, Norcross, GA 30093 (770) 381-7582
  • 5922 Kay Dr #A 1, Norcross, GA 30093 (678) 580-3466
  • 1700 Pierce St #601, Hollywood, FL 33020 (954) 921-6589
  • 1700 Pierce St #501, Hollywood, FL 33020
  • Coral Gables, FL
  • Loma Linda, CA
  • Detroit, MI
  • Duluth, GA
  • Chicago, IL
  • 5922 Kay Dr APT A, Norcross, GA 30093

Resumes

Resumes

Bogdan Simion Photo 1

Account Manager

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Location:
6071 south Topaz Pl, Chandler, AZ 85249
Industry:
Semiconductors
Work:
Intel Corporation
Account Manager

Intel Corporation
Senior Packaging Engineer

Readrite Corp Nov 1998 - May 2004
Reliability Manager

Seagate Technology Jan 1996 - Nov 1997
Advisory Senior Process Engineer
Education:
University of California, Berkeley 1988 - 1995
Doctorates, Doctor of Philosophy, Engineering, Philosophy
University of California, Berkeley 1987 - 1990
Bachelors, Bachelor of Science, Electronics Engineering, Materials Science, Engineering
Skills:
Processes Development
Project Management
Fundamental Analysis
Electronics Packaging
Six Sigma
Capital Equipment
Proof of Concept
Technology Pathfinding
Innovation
Technical Leadership
Statistical Data Analysis
Process Optimization
Multi Task and Handle High Volume Workloads
Strategic Planning
Cross Functional Team Leadership
Td and Hvm Performance Control
Employee Training
Mentoring
Vacuum Deposition
Thin Films
Thinking Outside the Box
Analytic Thinking
Material Selection
Molding
Dispensers
X Ray Crystallography
Materials Testing
Cross Functional Problem Solving
Design of Experiments
Supplier Evaluation
Supplier Sourcing
Risk Assessment
Languages:
Romanian
Bogdan Simion Photo 2

Inginer At Baaobaab Design

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Position:
inginer at BaaobaaB design (Sole Proprietorship)
Location:
Dambovita County, Romania
Industry:
Construction
Work:
BaaobaaB design
inginer
Bogdan Simion Photo 3

Executive Director/Sera Romania Foundation

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Position:
President at Federation of Non governmental organisation for Children - FONPC, Executive Director at SERA ROMANIA Foundation
Location:
Bucharest, Romania
Industry:
Nonprofit Organization Management
Work:
Federation of Non governmental organisation for Children - FONPC since Apr 1997
President

SERA ROMANIA Foundation since Jun 1996
Executive Director
Bogdan Simion Photo 4

Bogdan Simion

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Publications

Us Patents

Fluorination Pre-Treatment Of Heat Spreader Attachment Indium Thermal Interface Material

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US Patent:
7829195, Nov 9, 2010
Filed:
Dec 31, 2006
Appl. No.:
11/618905
Inventors:
Bogdan M. Simion - Chandler AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
B32B 5/02
US Classification:
428469, 165185, 257712, 427446, 428701
Abstract:
The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Fluorination Pre-Treatment Of Heat Spreader Attachment Indium Thermal Interface Material

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US Patent:
8211501, Jul 3, 2012
Filed:
Oct 18, 2010
Appl. No.:
12/907006
Inventors:
Bogdan M. Simion - Chandler AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
C23C 16/40
H05H 1/24
US Classification:
42725531, 42725539, 427569, 427576
Abstract:
The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink.

Differential Pressure Underfill Process And Equipment

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US Patent:
8366982, Feb 5, 2013
Filed:
Apr 7, 2010
Appl. No.:
12/755665
Inventors:
Bogdan M. Simion - Chandler AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
B29C 70/72
B29C 45/14
H01L 21/56
US Classification:
26427217, 249105, 249107, 425117, 425125, 4251291, 438112
Abstract:
The present disclosure relate to the field of depositing an underfill material between a microelectronic die and a substrate for flip-chip packages. In at least one embodiment, differential pressure is used to meter the underfill material during the underfill deposition process.

Underfill Material Dispenser

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US Patent:
8534574, Sep 17, 2013
Filed:
Apr 8, 2010
Appl. No.:
12/756726
Inventors:
Bogdan M Simion - Chandler AZ, US
Curtis S. White - Phoenix AZ, US
Sung-Won Moon - Phoenix AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
B05B 1/28
B05B 1/24
US Classification:
239290, 239139, 222509, 2221462
Abstract:
The present disclosure relate to the field of depositing an underfill material between a microelectronic die and a substrate for flip-chip packages with an underfill material dispenser. In at least one embodiment, an underfill material dispenser may include a heater having a plurality of conduits. Other embodiments of the present disclosure may further include multiple dispense needle configurations, angled dispense nozzle exit conduits, conical nozzle exit conduits, and satellite traps.

Mold Chase For Integrated Circuit Package Assembly And Associated Techniques And Configurations

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US Patent:
20150255448, Sep 10, 2015
Filed:
May 22, 2015
Appl. No.:
14/720651
Inventors:
- Santa Clara CA, US
Bogdan M. Simion - Chandler AZ, US
International Classification:
H01L 25/00
H01L 21/48
H01L 21/56
H01L 23/31
H01L 25/18
H01L 21/768
H01L 23/522
Abstract:
Embodiments of the present disclosure are directed towards a mold chase for integrated circuit package assembly and associated techniques and configurations. In one embodiment, a method includes receiving a package substrate, the package substrate including a first die mounted on the package substrate by a plurality of first interconnect structures, and a plurality of second interconnect structures disposed on the package substrate and to route electrical signals of a second die, protecting a top surface of individual interconnect structures of the plurality of second interconnect structures from deposition of a mold material, and depositing the mold material on the package substrate between the individual interconnect structures of the plurality of second interconnect structures. Other embodiments may be described and/or claimed.

Mold Chase For Integrated Circuit Package Assembly And Associated Techniques And Configurations

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US Patent:
20140084478, Mar 27, 2014
Filed:
Sep 26, 2012
Appl. No.:
13/627487
Inventors:
Bogdan M. Simion - Chandler AZ, US
International Classification:
H01L 23/48
B29B 13/00
H01L 21/50
US Classification:
257774, 438109, 425506, 257E23011, 257E21499
Abstract:
Embodiments of the present disclosure are directed towards a mold chase for integrated circuit package assembly and associated techniques and configurations. In one embodiment, a method includes receiving a package substrate, the package substrate including a first die mounted on the package substrate by a plurality of first interconnect structures, and a plurality of second interconnect structures disposed on the package substrate and configured to route electrical signals of a second die, protecting a top surface of individual interconnect structures of the plurality of second interconnect structures from deposition of a mold material, and depositing the mold material on the package substrate between the individual interconnect structures of the plurality of second interconnect structures. Other embodiments may be described and/or claimed.
Bogdan P Simion from Mesa, AZ, age ~51 Get Report