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Bjorn E Bjerede

from La Jolla, CA
Age ~85

Bjorn Bjerede Phones & Addresses

  • 603 Bonair Way, La Jolla, CA 92037 (858) 457-3910 (858) 459-1483 (619) 459-1483
  • 8654 Villa La Jolla Dr, La Jolla, CA 92037
  • San Diego, CA
  • Julian, CA
  • 603 Bonair Way, La Jolla, CA 92037 (858) 459-1483

Work

Company: Pcsi 1991 to 1997 Position: Director of rf engineering

Education

School / High School: Chalmers University of Technology 1958 to 1968

Emails

Industries

Wireless

Resumes

Resumes

Bjorn Bjerede Photo 1

Bjorn Bjerede

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Location:
San Diego, CA
Industry:
Wireless
Work:
PCSI 1991 - 1997
Director of RF Engineering
Education:
Chalmers University of Technology 1958 - 1968

Business Records

Name / Title
Company / Classification
Phones & Addresses
Bjorn Bjerede
Owner
Bjerede Consulting
Business Consulting Services
603 Bonair Way, La Jolla, CA 92037
(858) 459-1483

Publications

Us Patents

High-Dynamic-Range Ultra Wide Band Transceiver

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US Patent:
7567786, Jul 28, 2009
Filed:
Jul 9, 2005
Appl. No.:
11/177024
Inventors:
Bjorn Bjerede - La Jolla CA, US
International Classification:
H04B 1/26
H04B 7/00
H04B 1/06
US Classification:
4551961, 455255, 455315
Abstract:
An UWB Transceiver for Multi-Band OFDM communication including an antenna switch (), a receive front end and down-converter (), an up-converter and power amplifier (), and a frequency synthesizer (). The transceiver achieves high dynamic range by employing a synthesizer () with very low spurious components and a receive front end with an efficient receive RF filtering embodiment. The synthesizer () may rapidly switch frequencies in a manner that minimizes spurious components outside the band group used for communication. The receiver () also achieves high selectivity and sensitivity by dividing the receive signal path into even and odd band groups.

Digital Circuit For Generating Output Pulses Synchronized In Time To Zero Crossings Of Incoming Waveforms

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US Patent:
39463230, Mar 23, 1976
Filed:
Jul 25, 1974
Appl. No.:
5/491731
Inventors:
Bjorn E. Bjerede - San Diego CA
Assignee:
General Dynamics Corporation - San Diego CA
International Classification:
H03K 117
H03B 304
H03K 513
US Classification:
328 63
Abstract:
A digital phase locked loop circuit for use in synchronizing output timing pulses with the positive going zero-crossings of an input data signal by quantitizing the input analog data signal as digital information, storing the digital information at given times by timing pulses, pre-programming a counter with a count corresponding to the quantitized digital information stored, and advancing or lagging an updated timing pulse in accordance with the timed count of the program counter which count is synchronized with the zero-crossings of the input data signal, whereby the updated timing pulses move to synchronism with the zero-crossings of the input data signal.

Method And Apparatus Of Frequency Generation For Use With Digital Cordless Telephones

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US Patent:
57220409, Feb 24, 1998
Filed:
Feb 4, 1993
Appl. No.:
8/013625
Inventors:
Bjorn E. Bjerede - La Jolla CA
Joseph T. Lipowski - San Diego CA
James E. Petranovich - Encinitas CA
F. Matthew Rhodes - Encinitas CA
Assignee:
Pacific Communication Sciences, Inc. - San Diego CA
International Classification:
H04B 140
US Classification:
455 76
Abstract:
Methods and apparatus for digital cordless telephone systems are preferably implemented in an integrated circuit chip set having one or more chips, adapted to receive a voice signal, for converting the voice signal into a digital signal of a desired form, for converting the digital signal into an analog signal and for modifying the frequency of the analog signal, for up converting during transmission the frequency of the analog signal from an intermediate frequency to a desired radio frequency and for down converting during reception from a selected radio frequency to the intermediate frequency and for amplifying the radio frequency signal during transmission and for switching the antenna between the transmit and receive paths. It is preferred for the chip set to include a base chip, an intermediate frequency chip, a radio frequency chip and an amplifier chip. It is preferred to also provide a synthesizer integrated circuit chip for generating carrier select signals to be used by the radio frequency chip in selecting desired carrier frequencies.

Suppression Of Spurious Frequency Components In Direct Digital Frequency Synthesizer

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US Patent:
50738690, Dec 17, 1991
Filed:
Aug 25, 1989
Appl. No.:
7/398735
Inventors:
Bjorn E. Bjerede - La Jolla CA
Assignee:
Titan Linkabit Corporation - San Diego CA
International Classification:
G06F 102
US Classification:
364718
Abstract:
A direct digital frequency synthesizer generates an analog waveform of a predetermined frequency from accumulated digital frequency words which, as accumulated, represent the phase of a sine wave of the predetermined frequency. The synthesizer includes a phase accumulator, a 4-bit non-linear digital-to-analog converter (DAC) and a sample and hold circuit. The phase accumulator includes a 4-bit coarse-component accumulator for accumulating coarse phase components of the digital frequency words and a fine-component accumulator for accumulating fine phase components of the digital frequency words. The phase accumulator increments the coarse-component accumulator in response to the accumulated fine phase components exceeding a predetermined value. The 4-bit non-linear DAC converts the four bits accumulated in the coarse-component accumulator into an analog waveform of the predetermined frequency. The phase accumulator suppresses the generation of spurious frequency components in the analog waveform by randomly dithering the rate at which the coarse component accumulator is incremented by the phase accumulator.

Universal Radio Architecture For Low-Tier Personal Communication System

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US Patent:
56489854, Jul 15, 1997
Filed:
Nov 30, 1994
Appl. No.:
8/348359
Inventors:
Bjorn E. Bjerede - La Jolla CA
Joseph T. Lipowski - Boxborough MA
Benny Madsen - San Diego CA
Sheldon L. Gilbert - San Diego CA
James E. Petranovich - Encinitas CA
Assignee:
Rockwell Semiconductor Systems, Inc. - Newport Beach CA
International Classification:
H04B 138
US Classification:
375219
Abstract:
An integrated circuit chip set is provided for use in a radio communication system in which a modulated digital input signal is processed for transmission and a modulated signal received from an antenna is processed to provide an output signal, wherein the modulation of the signals is either QPSK or FSK and the signal transmission and reception is by either TDD or FDD. The chip set includes an IF integrated circuit chip for processing a digital input signal to convert the digital input signal into an analog input signal and to provide the input signal at an intermediate frequency and for processing a received signal at the intermediate frequency to down convert the frequency thereof and to provide an output signal from the down-converted received signal; and an RF integrated circuit chip for processing the input signal provided by the IF chip at the intermediate frequency to up convert the frequency thereof to a transmission frequency and for processing a received signal provided at the reception frequency to down convert the frequency thereof to the intermediate frequency. The IF chip includes switches and terminals for enabling the IF chip to be connected for processing by the IF chip of QPSK-modulated signals or to be connected for processing by the IF chip of FSK-modulated signals; and the RF chip includes terminals for enabling the RF chip to be connected for processing by the RF chip of TDD transmitted and received signals or to be connected for processing by the RF chip of FDD transmitted and received signals.

Method And Apparatus For Frequency Synthesization In Digital Cordless Telephones

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US Patent:
55265278, Jun 11, 1996
Filed:
Oct 1, 1993
Appl. No.:
8/131210
Inventors:
Joseph T. Lipowski - Boxborough MA
Bjorn E. Bjerede - La Jolla CA
John F. O'Connor - San Diego CA
Assignee:
Pacific Communication Sciences, Inc. - San Diego CA
International Classification:
H04Q 732
H03L 700
US Classification:
4551831
Abstract:
Methods and apparatus for frequency synthesization are shown for generating an output signal of desired frequency. The frequency synthesizer includes an oscillator for generating an output signal at the desired frequency in response to a control signal. A first detector compares the output signal to a reference signal and generates a first difference signal representative of the differences, preferably in phase and frequency, between the output and the reference signals. A second detector compares the output signal to the reference signal and generates a second difference signal. A controller generates the control signal in response to either the first or second difference signal. A selector member selects between the first and second detectors to provide either the first or second control signal to the controller in response to a selection signal. A lock detector detects when the output signal and said reference signal are in a predetermined relation and generates the switch signal in response to the detection of the occurrence of such predetermined relation.
Bjorn E Bjerede from La Jolla, CA, age ~85 Get Report