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Bhushan M Kanekar

from Saratoga, CA
Age ~58
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Also known as:
Bhushan Mangesh Kanekar, Bushan M Kanekar, Maureen Forlenza, N Kanekar
Phone and address:
13500 Debbie Ln, Saratoga, CA 95070
(408) 832-5683
Related to:
Michael A Forlenza, 39Kunal Kanekar, 27Matthew Carroll, 57Patricia A Carroll, 87Patricia A Carroll, 87Maureen Forlenza, 55Paul C Forlenza, 56Manisha B Kanekar, 56
Connected to:
Cheryl S Kanekar, 53Norman P Kaneklides, 70Alan T Kaneko, 64Alia N Kaneko, 42Allyson N Kaneko, 37Chad M Kaneko, 53Emi Kaneko, 42Eri Kaneko, 45Houdek Kaneko, 39Kazushige Kaneko, 51

Bhushan Kanekar Phones & Addresses

  • 13500 Debbie Ln, Saratoga, CA 95070 (408) 832-5683
  • 4022 Chamberer Dr, San Jose, CA 95135 (408) 528-9501
  • Simi Valley, CA
  • Santa Clara, CA
  • Howell, NJ

Work

Company: Vmware Nov 2017 Position: Senior director

Education

Degree: Master of Science, Masters School / High School: Indian Institute of Science (Iisc) 1988 to 1990 Specialities: Computer Science, Electronics

Skills

Routing • Tcp/Ip • Cisco Technologies • Ip • Data Center • Ethernet • Networking • Linux • Snmp • Internet Protocol Suite • Cisco Ios • Switches • Cloud Computing • Mpls • Qos • Internet Protocol • Ipv6 • Ospf • Cisco Systems Products • Sdn • Lan Switching • Firewalls • Vxworks • Open Daylight Project • Scalability • Multiprotocol Label Switching • Open Shortest Path First • Quality of Service • Openflow • Msdc Networking • Ip Services • Cisco Nxos • Innovative Problem Solver • Creative Problem Solving

Languages

English • Hindi

Industries

Computer Software

Resumes

Resumes

Bhushan Kanekar Photo 1

Senior Director

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Location:
San Francisco, CA
Industry:
Computer Software
Work:
Vmware
Senior Director
Amazon Web Services Feb 1, 2016 - Nov 2017
Senior Manager
Broadcom Aug 2014 - Jan 2016
Chief Solutions Architect, Sdn and Cloud
Io Visor Project Aug 2014 - Jan 2016
Member of the Board
Cisco May 2013 - Aug 2014
Distinguished Engineer, Sw
Education:
Indian Institute of Science (Iisc) 1988 - 1990
Master of Science, Masters, Computer Science, Electronics University of Mumbai 1984 - 1988
Skills:
Routing
Tcp/Ip
Cisco Technologies
Ip
Data Center
Ethernet
Networking
Linux
Snmp
Internet Protocol Suite
Cisco Ios
Switches
Cloud Computing
Mpls
Qos
Internet Protocol
Ipv6
Ospf
Cisco Systems Products
Sdn
Lan Switching
Firewalls
Vxworks
Open Daylight Project
Scalability
Multiprotocol Label Switching
Open Shortest Path First
Quality of Service
Openflow
Msdc Networking
Ip Services
Cisco Nxos
Innovative Problem Solver
Creative Problem Solving
Languages:
English
Hindi

Publications

Us Patents

Load Sharing And Redundancy Scheme

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US Patent:
6751191, Jun 15, 2004
Filed:
Jun 29, 1999
Appl. No.:
09/342859
Inventors:
Bhushan Mangesh Kanekar - San Jose CA
Saravanakumar Rajendran - San Jose CA
Jonathan Davar - Los Altos Hills CA
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
H04J 116
US Classification:
370217, 370219, 370469, 370392, 370401, 709249
Abstract:
Methods and apparatus for providing a device for forwarding packets in a network are disclosed. A first router and a second router having a shared set of interfaces are provided, enabling the first router and the second router to share forwarding data for forwarding packets on the shared set of interfaces.

Load Sharing And Redundancy Scheme

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US Patent:
7006431, Feb 28, 2006
Filed:
Nov 26, 2003
Appl. No.:
10/723371
Inventors:
Bhushan Mangesh Kanekar - San Jose CA, US
Saravanakumar Rajendran - San Jose CA, US
Jonathan Davar - Los Altos Hills CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
H04J 1/16
US Classification:
370217, 370219, 370392, 370401, 370469, 709246
Abstract:
Methods and apparatus for providing a device for forwarding packets in a network are disclosed. A first router and a second router having a shared set of interfaces are provided, enabling the first router and the second router to share forwarding data for forwarding packets on the shared set of interfaces.

Associative Memory Entries With Force No-Hit And Priority Indications Of Particular Use In Implementing Policy Maps In Communication Devices

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US Patent:
7082492, Jul 25, 2006
Filed:
Jul 29, 2003
Appl. No.:
10/630176
Inventors:
Venkateshwar Rao Pullela - San Jose CA, US
Dileep Kumar Devireddy - San Jose CA, US
Bhushan Mangesh Kanekar - San Jose CA, US
Stephen Francis Scheid - Campbell CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G06F 12/00
US Classification:
711108, 365 49
Abstract:
Methods and apparatus are disclosed for defining and using associative memory entries with force no-hit and priority indications of particular use in implementing policy maps in communication devices. In one use, a set of entries is determined based on a policy map with a force no-hit indication being associated with one or more of the entries. Additionally, programmable priority indications may be associated with one or more of the entries, or with the associative memory devices, associative memory banks, etc. The force no-hit indications are often used in response to identified deny instructions in an access control list or other policy map. A lookup operation is then performed on these associative memory entries, with highest matching result or results identified based on the programmed and/or implicit priority level associated with the entries, or with the associative memory devices, associative memory banks, etc.

Performing Lookup Operations Using Associative Memories Optionally Including Modifying A Search Key In Generating A Lookup Word And Possibly Forcing A No-Hit Indication In Response To Matching A Particular Entry

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US Patent:
7103708, Sep 5, 2006
Filed:
Aug 10, 2002
Appl. No.:
10/215719
Inventors:
William N. Eatherton - San Jose CA, US
Jaushin Lee - Saratoga CA, US
Bangalore L. Priyadarshan - Fremont CA, US
Priyank Ramesh Warkhede - San Jose CA, US
Fusun Ertemalp - Menlo Park CA, US
Hugh Weber Holbrook - San Francisco CA, US
Dileep Kumar Devireddy - San Jose CA, US
Bhushan Mangesh Kanekar - San Jose CA, US
Venkateshwar Rao Pullela - San Jose CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G06F 12/00
US Classification:
711108, 711 2, 711 5, 711101, 711170, 711173, 711202, 370235, 370328, 370382, 370386, 370389, 370392, 370400, 707 10
Abstract:
Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on modification mappings, forcing a no-hit condition in response to a highest-priority matching entry including a force no-hit indication, selecting among various sets or banks of associative memory entries in determining a lookup result, and detecting and propagating error conditions. In one implementation, each block retrieves a modification mapping from a local memory and modifies a received search key based on the mapping and received modification data. In one implementation, each of the associative memory entries includes a field for indicating that a successful match on the entry should or should not force a no-hit result. In one implementation, an indication of which associative memory blocks or sets of entries to use in a particular lookup operation is retrieved from a memory.

Generating And Merging Lookup Results To Apply Multiple Features

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US Patent:
7177978, Feb 13, 2007
Filed:
Jul 29, 2003
Appl. No.:
10/630174
Inventors:
Bhushan Mangesh Kanekar - San Jose CA, US
Venkateshwar Rao Pullela - San Jose CA, US
Dileep Kumar Devireddy - San Jose CA, US
Gyaneshwar S. Saharia - Cupertino CA, US
Dipankar Bhattacharya - Saratoga CA, US
Qizhong Chen - Palo Alto CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G06F 12/00
US Classification:
711108, 370351
Abstract:
Methods, apparatus, and other mechanisms are disclosed for merging lookup results, such as from one or more associative memory banks and/or memory devices. An access list is identified. A first set of entries corresponding to a first feature of the access control list entries and a second set of entries corresponding to a second feature of the access control list entries are identified. First and second associative memory banks are programmed respectively based on the first and second sets of entries. Lookup operations are then typically performed substantially simultaneously on the first and second sets of associative memory entries programmed in the associative memory banks to generate multiple lookup results, with these results typically being identified directly, or via a lookup operation in an adjunct memory or other storage mechanism. These lookup results are then combined to generate a merged lookup result.

Performing Lookup Operations On Associative Memory Entries

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US Patent:
7237059, Jun 26, 2007
Filed:
Dec 28, 2005
Appl. No.:
11/321918
Inventors:
William N. Eatherton - San Jose CA, US
Jaushin Lee - Saratoga CA, US
Bangalore L. Priyadarshan - Fremont CA, US
Priyank Ramesh Warkhede - San Jose CA, US
Fusun Ertemalp - Menlo Park CA, US
Hugh Weber Holbrook - San Francisco CA, US
Dileep Kumar Devireddy - San Jose CA, US
Bhushan Mangesh Kanekar - San Jose CA, US
Venkateshwar Rao Pullela - San Jose CA, US
Assignee:
Cisco Technology, Inc - San Jose CA
International Classification:
G06F 12/00
US Classification:
711108, 365 49
Abstract:
Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on modification mappings, forcing a no-hit condition in response to a highest-priority matching entry including a force no-hit indication, selecting among various sets or banks of associative memory entries in determining a lookup result, and detecting and propagating error conditions. In one implementation, each block retrieves a modification mapping from a local memory and modifies a received search key based on the mapping and received modification data. In one implementation, each of the associative memory entries includes a field for indicating that a successful match on the entry should or should not force a no-hit result. In one implementation, an indication of which associative memory blocks or sets of entries to use in a particular lookup operation is retrieved from a memory.

Generating And Merging Lookup Results To Apply Multiple Features

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US Patent:
7350020, Mar 25, 2008
Filed:
Aug 1, 2006
Appl. No.:
11/497171
Inventors:
Bhushan Mangesh Kanekar - San Jose CA, US
Venkateshwar Rao Pullela - San Jose CA, US
Dileep Kumar Devireddy - San Jose CA, US
Gyaneshwar S. Saharia - Cupertino CA, US
Dipankar Bhattacharya - Saratoga CA, US
Qizhong Chen - Palo Alto CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G06F 12/00
US Classification:
711108, 370392
Abstract:
Methods, apparatus, and other mechanisms are disclosed for merging lookup results, such as from one or more associative memory banks and/or memory devices. In one exemplary implementation, multiple associative memories or associative memory banks are configured to substantially simultaneously generate a plurality of lookup results based on a lookup value. Multiple memories are each configured to generate a corresponding result based on the lookup result generated by its corresponding associative memory or associative memory bank. A combiner is configured to receive and merge these corresponding results generated substantially simultaneously in order to identify the merged lookup result.

Generating Accounting Data Based On Access Control List Entries

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US Patent:
7689485, Mar 30, 2010
Filed:
Jul 29, 2003
Appl. No.:
10/630178
Inventors:
Bhushan Mangesh Kanekar - San Jose CA, US
Venkateshwar Rao Pullela - San Jose CA, US
Dileep Kumar Devireddy - San Jose CA, US
Suresh Gurajapu - Santa Clara CA, US
Gyaneshwar S. Saharia - Cupertino CA, US
Atul Rawat - Santa Clara CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G06Q 99/00
US Classification:
705 35, 718104, 399 79, 399 1
Abstract:
Methods, apparatus, and other mechanisms are disclosed for generating accounting or other data based on that indicated in access control lists or other specifications, and typically using associative memory entries in one or more associative memory banks and/or memory devices. One implementation identifies an access control list including multiple access control list entries, with a subset of these access control list entries identifying accounting requests. Accounting mechanisms are associated with each of said access control list entries in the subset of access control list entries identifying accounting requests. An item is identified, and a corresponding accounting mechanism is updated. In one implementation, the item includes at least one autonomous system number. In one implementation, at least one of the accounting mechanisms is associated with at least two different access control list entries in the subset of access control list entries identifying accounting requests.
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Bhushan M Kanekar from Saratoga, CA, age ~58 Get Report