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Benedict Gaster Phones & Addresses

  • Santa Cruz, CA
  • San Jose, CA
  • Mountain View, CA
  • Santa Clara, CA

Publications

Us Patents

Mapping Processing Logic Having Data-Parallel Threads Across Processors

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US Patent:
20110022817, Jan 27, 2011
Filed:
Jul 27, 2009
Appl. No.:
12/509763
Inventors:
Benedict GASTER - Mountain View CA, US
Jayanth Gummaraju - San Francisco CA, US
Laurent Morichetti - San Jose CA, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 9/46
G06F 12/02
US Classification:
711202, 718101, 711E12002
Abstract:
A method for executing a plurality of data-parallel threads of a processing logic on a processor core includes grouping the plurality of data-parallel threads into one or more workgroups, associating a first workgroup from the one or more workgroups with an operating system thread on the processor core, and configuring threads from the first workgroup as user-level threads within the operating system thread. In an example, a method enables the execution of GPU-kernels that has been previously configured for a GPU, to execute on a CPU such as a multi-core CPU. The mapping of the numerous data-parallel threads to the CPU is done in such a manner as to reduce the number of costly operating system threads instantiated on the CPU, and to enable efficient debugging.

Streaming Programming Generator

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US Patent:
20120102507, Apr 26, 2012
Filed:
Oct 26, 2010
Appl. No.:
12/911952
Inventors:
Alan B. Heirich - Half Moon Bay CA, US
Benedict R. Gaster - Santa Cruz CA, US
Assignee:
ADVANCED MICRO DEVICES, INC. - Sunnyvale CA
International Classification:
G06F 9/44
US Classification:
719328
Abstract:
A device receives input that includes definitions of components of a computational pipeline, where the components include one or more buffers, one or more kernels, and one or more stages within a control graph. The device generates, based on the input, kernel signatures for a graphics processor, where the kernel signatures compile into an executable streaming program for the computational pipeline. The device also generates, based on the input, host-side runtime code to execute the streaming program.

Low-Level Function Selection Using Vector-Width

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US Patent:
20130086565, Apr 4, 2013
Filed:
Sep 29, 2011
Appl. No.:
13/249154
Inventors:
Benedict R. Gaster - Santa Cruz CA, US
Lee W. Howes - Santa Clara CA, US
International Classification:
G06F 9/45
US Classification:
717148, 717146
Abstract:
A medium and method is disclosed for compiling vector programs. A compiler receives program code that includes a function invocation. The compiler determines the vector width of a target computer system and creates a width-specific executable version of the program code by mapping the function invocation to a width-specific implementation of the function. The width-specific implementation corresponds to the vector width of the target computer system.

Vector Width-Aware Synchronization-Elision For Vector Processors

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US Patent:
20130086566, Apr 4, 2013
Filed:
Sep 29, 2011
Appl. No.:
13/249171
Inventors:
Benedict R. Gaster - Santa Cruz CA, US
Lee W. Howes - Santa Clara CA, US
International Classification:
G06F 9/45
G06F 15/76
US Classification:
717148, 717146, 712 7, 712E09001
Abstract:
A medium, method, and apparatus are disclosed for eliding superfluous function invocations in a vector-processing environment. A compiler receives program code comprising a width-contingent invocation of a function. The compiler creates a width-specific executable version of the program code by determining a vector width of a target computer system and omitting the function from the width-specific executable if the vector width meets one or more criteria. For example, the compiler may omit the function call if the vector width is greater than a minimum size.

Method And System For Workitem Synchronization

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US Patent:
20130117750, May 9, 2013
Filed:
Nov 3, 2011
Appl. No.:
13/288833
Inventors:
Lee W. HOWES - Santa Clara CA, US
Benedict R. Gaster - Santa Cruz CA, US
Michael C. Houston - Cupertino CA, US
Michael Mantor - Orlando FL, US
Mark Leather - Los Gatos CA, US
Norman Rubin - Cambridge MA, US
Brian D. Emberling - San Mateo CA, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 9/46
US Classification:
718102
Abstract:
Method, system, and computer program product embodiments for synchronizing workitems on one or more processors are disclosed. The embodiments include executing a barrier skip instruction by a first workitem from the group, and responsive to the executed barrier skip instruction, reconfiguring a barrier to synchronize other workitems from the group in a plurality of points in a sequence without requiring the first workitem to reach the barrier in any of the plurality of points.

Computer System And Method For Compiling Program Code And Assigning Address Spaces

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US Patent:
20130125100, May 16, 2013
Filed:
Nov 15, 2011
Appl. No.:
13/296967
Inventors:
Bixia Zheng - Palo Alto CA, US
Benedict R. Gaster - Santa Cruz CA, US
Assignee:
ADVANCED MICRO DEVICES, INC. - Sunnyvale CA
International Classification:
G06F 9/45
US Classification:
717140
Abstract:
A computer system is provided for compiling program code and a method for compiling program code by a processor. The method, for example, includes, but is not limited to, receiving, by the processor, the program code and compiling, by the processor, the program code, wherein the processor, when compiling the program code, parses the program code and assigns a default address space qualifier to each member functions without a defined address space qualifier and, when the member function is used, infers an address space for each default address qualifier based upon how the respective member function is being used.

Multithreaded Computing

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US Patent:
20130191852, Jul 25, 2013
Filed:
Sep 7, 2012
Appl. No.:
13/606741
Inventors:
Lee W. Howes - Austin TX, US
Benedict R. Gaster - Santa Cruz CA, US
Michael Clair Houston - Cupertino CA, US
Michael Mantor - Orlando FL, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 9/46
US Classification:
719318
Abstract:
A system, method, and computer program product are provided for improving resource utilization of multithreaded applications. Rather than requiring threads to block while waiting for data from a channel or requiring context switching to minimize blocking, the techniques disclosed herein provide an event-driven approach to launch kernels only when needed to perform operations on channel data, and then terminate in order to free resources. These operations are handled efficiently in hardware, but are flexible enough to be implemented in all manner of programming models.

Abstracting Scratch Pad Memories As Distributed Arrays

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US Patent:
20130212350, Aug 15, 2013
Filed:
Feb 15, 2012
Appl. No.:
13/397391
Inventors:
Benedict R. Gaster - Santa Cruz CA, US
Lee W. Howes - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 12/02
US Classification:
711170, 711E12002
Abstract:
In a computing system, memory may be managed by using a distributed array, which is a global set of local memory regions. A segment in the distributed array is allocated and is bound to a physical memory region. The segment is used by a workgroup in a dispatched data parallel kernel, wherein a workgroup includes one or more work items. When the distributed array is declared, parameters of the distributed array may be defined. The parameters may include an indication whether the distributed array is persistent (data written to the distributed array during one parallel dispatch is accessible by work items in a subsequent dispatch) or an indication whether the distributed array is shared (nested kernels may access the distributed array). The segment may be deallocated after it has been used.
Benedict R Gaster from Santa Cruz, CA Get Report