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Ayoob E Dooply

from Culver City, CA
Age ~59

Ayoob Dooply Phones & Addresses

  • Culver City, CA
  • 5155 Renaissance Ave UNIT B, San Diego, CA 92122 (858) 847-0140
  • 3975 Miramar St, La Jolla, CA 92037
  • Hillsboro, OR
  • 10637 Gracewood Pl, San Diego, CA 92130

Industries

Wireless

Resumes

Resumes

Ayoob Dooply Photo 1

Ayoob Dooply

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Location:
San Diego, CA
Industry:
Wireless

Publications

Us Patents

System And Method For Tolerating Data Link Faults In Communications With A Switch Fabric

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US Patent:
7221652, May 22, 2007
Filed:
Mar 3, 2003
Appl. No.:
10/378480
Inventors:
Sushil Kumar Singh - San Diego CA, US
Kenneth Yi Yun - San Diego CA, US
Jianfeng Shi - Encinitas CA, US
Eli James Aubrey Fernald - San Diego CA, US
Kirk Alvin Miller - San Diego CA, US
Prayag Bhanubhai Patel - San Diego CA, US
Ayoob Eusoof Dooply - San Diego CA, US
George Beshara Bendak - San Diego CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
G01R 31/08
US Classification:
370242, 370390
Abstract:
A system and method are provided for tolerating data line faults in a packet communications network. The method comprises: serially transmitting information packets from at least one traffic manager (TM); at a switch fabric, accepting information packets at a plurality of ingress ports, the information packets addressing destination port card egress ports; selectively connecting port card ingress ports to port card egress ports; serially supplying information packets from a plurality of port card egress ports; sensing a connection fault between the switch fabric and the TM; and, in response to sensing the fault, reselecting connections between the switch fabric port card ports and the TM. Some aspects comprise: an ingress memory subsystem (iMS) receiving cells on an ingress port exceeding an error threshold. Then, reselecting connections between the port card ports and the TM includes the iMS sending a message to the iTM identifying the faulty ingress connection.

Configurable Switch Fabric Interface Bandwidth System And Method

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US Patent:
7298754, Nov 20, 2007
Filed:
Mar 31, 2003
Appl. No.:
10/403964
Inventors:
Kirk Alvin Miller - San Diego CA, US
Prayag Bhanubhai Patel - San Diego CA, US
George Beshara Bendak - San Diego CA, US
Kenneth Yi Yun - San Diego CA, US
Sushil Kumar Singh - San Diego CA, US
Ayoob Eusoof Dooply - San Diego CA, US
Michael John Hellmer - Carlsbad CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
H04L 12/56
US Classification:
370401, 370419, 370463
Abstract:
A system and method are provided for configuring interface bandwidths in a packet communications switch fabric. The method comprises: interfacing data links with a first plurality of traffic managers (TMs); differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs; and, communicating packets information with the TMs at a first plurality of data rates corresponding to the first plurality of subchannels. More specifically, differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs includes: differentiating a second plurality of ingress data links into a third plurality of ingress subchannels associated with a third plurality of ingress traffic managers (iTMs); and, differentiating a fourth plurality of egress data links into a fifth plurality of egress subchannels associated with a fifth plurality of egress TMs (eTMs).

System And Method For Systolic Array Sorting Of Information Segments

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US Patent:
6879596, Apr 12, 2005
Filed:
Apr 11, 2001
Appl. No.:
09/832784
Inventors:
Ayoob Eusoof Dooply - La Jolla CA, US
Assignee:
Applied Micro Circuits Corporation - San Diego CA
International Classification:
H04L012/28
H04L012/56
US Classification:
370412, 370389
Abstract:
A system and method have been provided for sorting information segments in a packet/cell earliest deadline first queue circuit. The invention permits information segments to be inserted at a rate that is twice as fast as the maximum extraction rate. Pairs of permanent and temporary registers are organized into a hierarchical sequence of stages. Generally, information segments with lower field ranks move systolically through the stages to temporary registers in higher sequence stages. Information segments with higher field ranks move systolically through the stages to permanent registers lower in the sequence of stages. The invention permits the highest rank information segments to be sorted and extracted with great efficiency.
Ayoob E Dooply from Culver City, CA, age ~59 Get Report