Resumes
Resumes
Engineering Manager- Intel Data Center Group
View pageLocation:
San Francisco, CA
Industry:
Semiconductors
Work:
Intel Corporation
Engineering Manager- Intel Data Center Group
Cadence Design Systems Aug 2016 - Jun 2018
Senior Principal Engineer
Xilinx Dec 2013 - Jul 2016
Engineering Staff at Xilinx
Xilinx Jan 2012 - Dec 2013
Engineering Manager
Xilinx Aug 2009 - Feb 2012
Engineer Staff
Engineering Manager- Intel Data Center Group
Cadence Design Systems Aug 2016 - Jun 2018
Senior Principal Engineer
Xilinx Dec 2013 - Jul 2016
Engineering Staff at Xilinx
Xilinx Jan 2012 - Dec 2013
Engineering Manager
Xilinx Aug 2009 - Feb 2012
Engineer Staff
Education:
Interface - Institute of Information Technology 2000 - 2000
University Institute of Chemical Technology (Formerly Udct) 1996 - 2000
Bachelor of Engineering, Bachelors, Electronics
University Institute of Chemical Technology (Formerly Udct) 1996 - 2000
Bachelor of Engineering, Bachelors, Electronics
Skills:
Fpga
Debugging
Eda
Rtl Design
Embedded Systems
Vhdl
Vlsi
Digital Image Processing
Verilog
Xilinx
Field Programmable Gate Arrays
Tcl
Asic
Modelsim
Hardware Architecture
Testing
Very Large Scale Integration
Timing Closure
Application Specific Integrated Circuits
Debugging
Eda
Rtl Design
Embedded Systems
Vhdl
Vlsi
Digital Image Processing
Verilog
Xilinx
Field Programmable Gate Arrays
Tcl
Asic
Modelsim
Hardware Architecture
Testing
Very Large Scale Integration
Timing Closure
Application Specific Integrated Circuits