Arthur H Mones

49822675, Jan 1, 1991

May 8, 1987

7/048532

Arthur H. Mones - Raleigh NC
Xavier Sheehy - Park Ridge IL
Richard K. Spielberger - Maple Grove MN

Atmel Corporation - San Jose CA

H01L 2312
H01L 2314
H01L 2348

357 71

An integrated semiconductor package comprising a semiconductor body having a first surface and a plurality of pins, each pin having first and second ends. Also disclosed is an apparatus for connecting the first end of each pin to the first surface of the semiconductor body so that the semiconductor body provides the physical integrity to support the pins above and substantially perpendicular to the first surface. The apparatus of connecting the first end of each pin to the first surface comprises a plurality of metalization interconnects. A metalization interconnect is interspaced between the first end of each pin and the first surface of the semiconductor body. The pins are arranged in an array so that the second end of each pin can be removably inserted into a pin-grid socket.

43326242, Jun 1, 1982

Dec 3, 1980

6/212763

Jay P. Page - Phoenix AZ
Arthur H. Mones - Edina MN

Honeywell Information Systems Inc. - Phoenix AZ

B08B 308
C23G 110

134 3

Exposed surfaces of a layer of a copper thick film paste on a multilayer substrate are cleaned after being fired so that such surfaces are readily solderable to the extent that conventional tin/lead solders will wet said surfaces. The substrate with the exposed surfaces of a layer of a fired copper thick film paste is cleaned by being immersed in a warm dilute solution of an acid containing a fluoride ion, such as HF or HBF. sub. 4 for a short period of time. After the short period of time of immersion has elapsed, the substrate is removed from the dilute acid solution and rinsed to remove substantially all traces of the cleaning solution.

42738598, Jun 16, 1981

Dec 31, 1979

6/108760

Arthur H. Mones - Phoenix AZ
Jack A. Sartell - Bloomington MN
Vahram S. Kardashian - Plymouth MN

Honeywell Information Systems Inc. - Phoenix AZ

H01L 2188

430315

An improved method of forming raised input/output (I/O) terminals on the top surfaces of semiconductor elements of a semiconductor wafer. After via openings are formed through the passivation layer of such elements at locations where the I/O terminals are to be formed, which openings provide access to the metalization layers of the elements photolithographic techniques using a layer of heat resistant photoresist which is laminated to the top surface of the wafer are used to form openings through the photoresist layer to provide access to the metalization layers through the vias. A barrier metal layer is deposited on the exposed surfaces of the photoresist, and the metalization layers, and passivation layer of the elements. The barrier metal layer overlying the photoresist and then the photoresist are stripped from the wafer. The same photolithographic techniques using the same heat resistant photoresist material are used to define openings surrounding the barrier metal lining the via openings.

42952719, Oct 20, 1981

Apr 3, 1980

6/137043

Donald Neuhoff - Phoenix AZ
Arthur H. Mones - Phoenix AZ
Man K. Lam - Phoenix AZ

Honeywell Information Systems Inc. - Phoenix AZ

H05K 334

29840

A solderable gold conductor composition is formed by dispersing gold and certain inorganic binders in an inert liquid vehicle composition which can be used to produce conductor patterns which patterns adhere to fired ceramic substrates and to which can be soldered leads of electronic components. A method of soldering a copper lead to a lead pad on a substrate. A conductor pattern including at least one lead pad is printed on the substrate using a gold thick film paste composition. The gold composition is composed of finely divided gold particles and finely divided inorganic binder particles dispersed in an inert liquid vehicle, containing by weight 98-99 percent gold particles and complementally 2-1 percent of inorganic binder particles. The binder consists essentially by total weight of gold and binder of 0. 6-0. 2 percent copper, 0.

52945677, Mar 15, 1994

Oct 8, 1993

8/002247

Jay R. Dorfman - Durham NC
Richard R. Draudt - Pittsboro NC
Thomas D. Lantzer - Fuquay-Varina NC
Arthur H. Mones - Cary NC
David L. Sutton - Raleigh NC

E. I. Du Pont de Nemours and Company - Wilmington DE

H01L 2144

437187

The invention is directed to a method for rapidly forming a dense pattern of via holes in multilayer electronic circuits in which via holes in the dielectric layers are formed by drilling with an excimer laser under controlled operating conditions.

41729072, Oct 30, 1979

Dec 29, 1977

5/865546

Arthur H. Mones - Phoenix AZ
James E. O'Keefe - Phoenix AZ

Honeywell Information Systems Inc. - Phoenix AZ

B05D 512
H01L 2188

427 96

A method of protecting from physical damage the upper surface of medium and large scale integrated IC circuit chips. Certain types of IC chips are provided with a plurality of input/output terminals, or bumps, which project above the upper surface of the chips on which they are formed. The upper surface of each such chip, including its bumps, are spin coated with a thin adhesion promoter which is then dried. The chips and its terminals are next spin coated with a layer of a heat curable resin which is partially cured. The resin and the adhesion promoter are then removed from the upper surfaces of the bump by rubbing with a soft abrasive material. The resin remaining on each IC chip is then finally cured.