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Leon Krantz Phones & Addresses

  • Mission Viejo, CA
  • Aliso Viejo, CA
  • Pasadena, CA
  • Sierra Madre, CA

Publications

Us Patents

Methods And Systems For Arbitrating Access To A Disk Controller Buffer Memory By Allocating Various Amounts Of Times To Different Accessing Units

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US Patent:
6530000, Mar 4, 2003
Filed:
Mar 24, 1999
Appl. No.:
09/275629
Inventors:
Leon A. Krantz - Mission Viejo CA
Frank W. Campbell - Long Beach CA
Assignee:
Qlogic Corporation - Aliso Viejo CA
International Classification:
G06F 1318
US Classification:
711151, 711112, 711147, 711158, 711167, 710 40, 710 45, 710 52
Abstract:
A method and system for arbitrating access to a shared disk controller resource, including a buffer memory of a hard disk controller (HDC). An access cycle with a first cycle duration are disclosed and a first amount of time is allocated to a first accessing unit including an error correction code (ECC) engine, a microprocessor first-in-first-out (FIFO) unit, or a memory refresh/data format data fetch unit. The shared controller resource is accessed using the first accessing unit for a first duration, where the first duration is no greater than the first amount of time. A second amount of time and an unused portion of the first amount of time is allocated to a second accessing unit such as a disk formatter. Arbitration limit registers may be used to specify the number of HDC clock cycles per access cycle available to an accessing unit during which it can access the buffer memory. A global arbitration limit counter may be used to keep track of the duration of the accessing units.

Wwn Table Management System And Method

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US Patent:
7707338, Apr 27, 2010
Filed:
Mar 8, 2007
Appl. No.:
11/715568
Inventors:
James A. Walch - Mission Viejo CA, US
Leon A. Krantz - Mission Viejo CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
G06F 13/12
US Classification:
710 74, 710 48, 710 52
Abstract:
A data storage controller includes a link module that selectively sets an interrupt. A control module is external to the link module that includes N buffers where N is an integer greater than 0. The controller allocates at least one of the N buffers to store world wide name (“WWN”) table data in response to the interrupt. The controller also internally manages the WWN table data.

Storage Controllers With Dynamic Wwn Storage Modules And Methods For Managing Data And Connections Between A Host And A Storage Device

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US Patent:
7757009, Jul 13, 2010
Filed:
Jul 19, 2004
Appl. No.:
10/894144
Inventors:
Leon A. Krantz - Mission Viejo CA, US
Kha Nguyen - Anaheim CA, US
Michael J. North - Orange CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
G06F 3/00
US Classification:
710 6, 710 4, 710 5, 710 9, 710 26, 711 4, 711202, 711205, 709242
Abstract:
A method and system for transferring data between a host and a Serial Attached Small Computer Interface (“SAS”) device using a storage controller is provided. The storage controller includes, a World Wide Name (“WWN”) module that includes a table having plural entries, wherein each row includes a WWN address, an initiator tag value field, an input/output counter value that tracks plural commands for a connection. A WWN index value represents the address of a row having plural entries. The method includes, comparing frame elements of incoming frames, including a unique WWN address with the WWN module entries; and if there is a match, updating a counter value for a connection between the storage controller and a device sending frames. The counter value is increased when a command frame is received and decreased when a command is executed and a response is sent to the device.

Storage Controllers With Dynamic Wwn Storage Modules And Methods For Managing Data And Connections Between A Host And A Storage Device

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US Patent:
7984252, Jul 19, 2011
Filed:
Jul 9, 2010
Appl. No.:
12/833026
Inventors:
Leon A. Krantz - Mission Viejo CA, US
Kha Nguyen - Anaheim CA, US
Michael J. North - Orange CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
G06F 13/00
G06F 13/28
G06F 3/00
US Classification:
711154, 709225, 709242, 710 4, 710 5, 710 6, 710 9, 710 26, 711 4, 711100, 711202, 711205
Abstract:
A controller including an interface module and an index module. The interface module is configured to connect devices. The index module is configured to include, in a table stored in memory, an entry for each of the devices. Each entry includes an address field. The index module is configured to: receive a frame of data including an address of one of the devices; compare the address to the address fields associated with the entries in the table; in response to the address matching one of the address fields, access an index value identifying an entry of the table when the address matches one of the address fields; and in response to the address not matching one of the address fields, generate the index value. The index value is used to connect the device associated with the matching one of the address fields with the one of the devices.

System And Method For Transferring Data Using Storage Controllers

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US Patent:
20060015659, Jan 19, 2006
Filed:
Jul 19, 2004
Appl. No.:
10/893822
Inventors:
Leon Krantz - Mission Viejo CA, US
Kha Nguyen - Anaheim CA, US
Huy Nguyen - Laguna Hills CA, US
International Classification:
G06F 3/00
US Classification:
710052000
Abstract:
A method and a storage controller for transferring data between a host and a storage device is provided. The storage controller includes, a transport module having a first in first out (“FIFO”) for receiving frames from a link module, wherein the FIFO uses two pointers; the first pointer points to a location of a frame that is received with cyclic redundancy code (“CRC”) and the second pointer points to the frame after the CRC is verified and the frame is acceptable. The method includes, using a first pointer to point to a location when a frame arrives without the CRC; and verifying the CRC and if a frame is acceptable using a second pointer to point to the first pointer location. If a frame is corrupt the first pointer and the second pointer point to a location of a receive pointer.

System And Method For Transmitting Data In Storage Controllers

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US Patent:
20060015774, Jan 19, 2006
Filed:
Jul 19, 2004
Appl. No.:
10/894143
Inventors:
Huy Nguyen - Laguna Hills CA, US
Leon Krantz - Mission Viejo CA, US
William Dennin - Mission Viejo CA, US
International Classification:
G06F 11/00
US Classification:
714018000
Abstract:
A method and system for transferring frames from a storage device to a host system via a controller is provided. The method includes transferring frames from a transport module to a link module; and sending an acknowledgment to the transport module, wherein the link module sends the acknowledgement to the transport module and it appears to the transport module as if the host system sent the acknowledgement. The frames in the controller are tracked by creating a status entry indicating that a new frame is being created; accumulating data flow information, while a connection to transfer the frame is being established by a link module; and updating frame status as frame build is completed, transferred, and acknowledged. The controller includes, a header array in a transport module of the controller, wherein the header array includes plural layers and one of the layers is selected to process a frame.

Auxiliary Message Arbitrator For Digital Message Transfer System In Network Of Hardware Modules

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US Patent:
58420037, Nov 24, 1998
Filed:
Mar 26, 1997
Appl. No.:
8/886818
Inventors:
Richard Mike Holmes - Mission Viejo CA
Mark Jeffrey Tadman - Mission Viejo CA
Leon Arie Krantz - Mission Viejo CA
Assignee:
Unisys Corporation - Blue Bell PA
International Classification:
G06F 938
H04J 302
US Classification:
395500
Abstract:
A hardware message transfer control unit designated as the Auxiliary Message Arbitrator Unit (AMA) manages message transfers and transfer protocols in a network of sending and receiving digital hardware modules. Flexibility of network expansion to include software emulated digital modules to the hardware modules is provided in RAM circuitry at the message transfer control unit.

Control Method For Message Communication In Network Supporting Software Emulated Modules And Hardware Implemented Modules

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US Patent:
59832665, Nov 9, 1999
Filed:
Mar 26, 1997
Appl. No.:
8/886817
Inventors:
Mark Jeffrey Tadman - Mission Viejo CA
Richard Mike Holmes - Mission Viejo CA
Leon Arie Krantz - Mission Viejo CA
Assignee:
Unisys Corporation - Blue Bell PA
International Classification:
G06F 1338
G06F 1517
US Classification:
709216
Abstract:
A method for message transfers between digital modules in a network where some modules are hardware implemented and some modules are emulated in software. An Auxiliary Message Arbitrator Unit utilizes Main Memory storage for messages destined for receiving modules. Algorithmic sequencing means maintains chronological transfer operations of messages and uses hard and soft Interrupt signal queues to inform respective hard and soft modules of pending messages for them to retrieve.
Leon Arie Krantz from Mission Viejo, CA, age ~76 Get Report