Search

Ankit Sinha

from Aloha, OR
Age ~35
Get Report
Related to:
Vikram A Simha, 40Vikram SimhaA P Simha, 40
Connected to:
Abhraneel Sinha, 36Ajeet K Sinha, 38Akansha A Sinha, 33Ambrish Sinha, 43Anik Sinha, 46Anjali Sinha, 32Ankush Sinha, 37Anushka Sinha, 45Anushua Sinha, 58Arnav Sinha, 40

Ankit Sinha Phones & Addresses

  • Aloha, OR
  • Arlington, TX

Resumes

Resumes

Ankit Sinha Photo 1

Bios Engineer

View page
Location:
Hillsboro, OR
Industry:
Design
Work:
Advantech
Bios Engineer
Intel Corporation Aug 2012 - Sep 2013
Embedded Software Intern
Intel Corporation Aug 2012 - Sep 2013
Uefi Bios Engineer
Education:
The University of Texas at Arlington 2013
Masters, Master of Science In Electrical Engineering The University of Texas at Arlington 2011 - 2013
Master of Science, Masters, Electrical Engineering Sapthagiri College of Engineering 2011
Visvesvaraya Technological University 2007 - 2011
Bachelor of Engineering, Bachelors, Electronics Engineering Sapthagiri College of Engg,Bengaluru
Skills:
Embedded Systems
C
Linux
Embedded C
Microcontrollers
Firmware
Testing
Embedded Software
Assembly Language
Rtos
Microprocessors
Processors
Spi
Power Management
Programming
Software Development
Windows
Microsoft Office
Technical Leadership
Dspic
Rf Circuits
Dac
Motion Control
Uart
Pci
Pcie
Acpi
Motorcycle Racing
Trace32
Debugging
Git
Perforce
Python
Embedded Linux
Ankit Sinha Photo 2

Ankit Sinha

View page

Publications

Us Patents

Methods And Apparatus For In-Field Mitigation Of Firmware Failures

View page
US Patent:
20190227876, Jul 25, 2019
Filed:
Mar 30, 2019
Appl. No.:
16/370962
Inventors:
Sean Dardis - Hillsboro OR, US
Karunakara Kotary - Portland OR, US
Michael Kubacki - Hillsboro OR, US
Ankit Sinha - Hillsboro OR, US
International Classification:
G06F 11/14
G06F 8/65
Abstract:
Methods, apparatus, systems and articles of manufacture for mitigating a firmware failure are disclosed. An example apparatus includes at least one hardware processor and first memory including instructions to be executed by the at least one hardware processor. The example apparatus further includes mask memory including a feature mask associated with a first firmware version, the feature mask identifying features of the first firmware version to be disabled. A platform firmware controller is to apply the first firmware version to the first memory for execution by the at least one processor, initialize the at least one processor using the feature mask, and in response to a detection of a failure, determine a first de-feature mask based on a second de-feature mask previously used by the at least one processor and the feature update mask; and initialize the processor using the first de-feature mask.

Methods And Apparatus To Utilize Non-Volatile Memory For Computer System Boot

View page
US Patent:
20190042272, Feb 7, 2019
Filed:
Jun 29, 2018
Appl. No.:
16/024047
Inventors:
- Santa Clara CA, US
Sean Dardis - Hillsboro OR, US
Michael Kubacki - Hillsboro OR, US
Ankit Sinha - Hillsboro OR, US
International Classification:
G06F 9/4401
G06F 9/445
G06F 3/06
G06F 12/02
G06F 12/06
Abstract:
Methods, apparatus, systems and articles of manufacture are disclosed to utilize non-volatile memory for computer system boot. An example processor platform includes a non-volatile memory coupled to a processing unit via a bus, and a microcontroller to: configure the processing unit to store, on the non-volatile memory, a heap and a stack for execution of boot code, and configure the processing unit to execute the boot code stored on the non-volatile memory.
Control profile
Ankit Sinha from Aloha, OR, age ~35 Get Report