Ajeet R Rohatgi

6429546, Aug 6, 2002

Nov 19, 1999

09/443619

Michael Eugene Ropp - Brookings SD
Ajeet Rohatgi - Marietta GA
Miroslav M. Begovic - Atlanta GA

Georgia Tech Research Corporation - Atlanta GA

H02J 300

307 31, 307 43, 307 38, 307 51, 307 87

A preferred embodiment of the electrical power system of the present invention includes a power conditioning unit which is configured to receive the DC electrical output signal to deliver an AC output signal to a grid-connected load. Preferably, the power conditioning unit includes a controller which is configured to monitor the AC output signal so that the power conditioning unit may cease delivering the AC output signal when a characteristic of the AC output signal satisfies an established criterion.

7741225, Jun 22, 2010

May 6, 2008

12/116132

Ajeet Rohatgi - Marietta GA, US
Vichai Meemongkolkiat - Atlanta GA, US

Georgia Tech Research Corporation - Atlanta GA

H01L 21/311

438700

A thin silicon solar cell having a back dielectric passivation and rear contact with local back surface field is described. Specifically, the solar cell may be fabricated from a crystalline silicon wafer having a thickness from 50 to 500 micrometers. A barrier layer and a dielectric layer are applied at least to the back surface of the silicon wafer to protect the silicon wafer from deformation when the rear contact is formed. At least one opening is made to the dielectric layer. An aluminum contact that provides a back surface field is formed in the opening and on the dielectric layer. The aluminum contact may be applied by screen printing an aluminum paste having from one to 12 atomic percent silicon and then applying a heat treatment at 750 degrees Celsius.

7790574, Sep 7, 2010

Dec 13, 2005

11/301527

Ajeet Rohatgi - Atlanta GA, US
Dong Seop Kim - Atlanta GA, US
Kenta Nakayashiki - Smyrna GA, US
Brian Rounsaville - Stockbridge GA, US

Georgia Tech Research Corporation - Atlanta GA

H01L 21/00

438460, 148 333, 148 335, 438558, 438560

Disclosed are various embodiments that include a process, an arrangement, and an apparatus for boron diffusion in a wafer. In one representative embodiment, a process is provided in which a boric oxide solution is applied to a surface of the wafer. Thereafter, the wafer is subjected to a fast heat ramp-up associated with a first heating cycle that results in a release of an amount of boron for diffusion into the wafer.

7842596, Nov 30, 2010

May 6, 2008

12/116100

Ajeet Rohatgi - Marietta GA, US
Vichai Meemongkolkiat - Atlanta GA, US

Georgia Tech Research Corporation - Atlanta GA

H01L 21/44

438610, 438 38, 257E21496, 257E21477

A thin silicon solar cell having a back dielectric passivation and rear contact with local back surface field is described. Specifically, the solar cell may be fabricated from a crystalline silicon wafer having a thickness from 50 to 500 micrometers. A barrier layer and a dielectric layer are applied at least to the back surface of the silicon wafer to protect the silicon wafer from deformation when the rear contact is formed. At least one opening is made to the dielectric layer. An aluminum contact that provides a back surface field is formed in the opening and on the dielectric layer. The aluminum contact may be applied by screen printing an aluminum paste having from one to 12 atomic percent silicon and then applying a heat treatment at 750 degrees Celsius.

8071418, Dec 6, 2011

Jun 3, 2010

12/793334

Ajeet Rohatgi - Marietta GA, US
Vijay Yelundur - Canton GA, US
Preston Davis - Atlanta GA, US
Vinodh Chandrasekaran - Suwanee GA, US
Ben Damiani - Atlanta GA, US

Suniva, Inc. - Norcross GA

H01L 21/22

438 87, 438530, 257E21147

Solar cells and methods for their manufacture are disclosed. An example method may include providing a silicon substrate and introducing dopant to one or more selective regions of the front surface of the substrate by ion implantation. The substrate may be subjected to a single high-temperature anneal cycle. Additional dopant atoms may be introduced for diffusion into the front surface of the substrate during the single anneal cycle. A selective emitter may be formed on the front surface of the substrate such that the one or more selective regions of the selective emitter layer are more heavily doped than the remainder of the selective emitter layer. Associated solar cells are also provided.

8076175, Dec 13, 2011

Feb 25, 2008

12/036829

Daniel L. Meier - Atlanta GA, US
Ajeet Rohatgi - Marietta GA, US

H01L 21/20

438 96, 257E31043

A thin silicon solar cell is described. Specifically, the solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a third region that creates heterojunction surface passivation. Amorphous silicon layers are deposited on both sides of the silicon wafer at temperatures below approximately 400 degrees Celsius to reduce the loss of passivation properties of the amorphous silicon. A final layer of transparent conductive oxide is formed on both sides at approximately 165 degrees Celsius. Metal contacts are applied to the transparent conductive oxide. The low temperatures and very thin material layers used to fabricate the outer layers of used to fabricate the outer layers of the solar cell protect the thin wafer from excessive stress that may lead to deforming the wafer.

8110431, Feb 7, 2012

Jun 3, 2010

12/793363

Ajeet Rohatgi - Marietta GA, US
Vijay Yelundur - Canton GA, US
Vinodh Chandrasekaran - Suwanee GA, US
Preston Davis - Atlanta GA, US
Ben Damiani - Atlanta GA, US

Suniva, Inc. - Norcross GA

H01L 31/18

438 98, 438530, 438533, 257E21147

Solar cells and methods for their manufacture are disclosed. An example method may include providing a p-type doped silicon substrate and introducing n-type dopant to a first and second region of the front surface of the substrate by ion implantation so that the second region is more heavily doped than the first region. The substrate may be subjected to a single high-temperature anneal cycle to activate the dopant, drive the dopant into the substrate, produce a p-n junction, and form a selective emitter. Oxygen may be introduced during the single anneal cycle to form in situ front and back passivating oxide layers. Fire-through of front and back contacts as well as metallization with contact connections may be performed in a single co-firing operation. Associated solar cells are also provided.

20050189015, Sep 1, 2005

Oct 29, 2004

10/977751

Ajeet Rohatgi - Marietta GA, US
Ji-Weon Jeong - Daejun, KR
Kenta Nakayashiki - Smyrna GA, US
Vijay Yelundur - Woodstock GA, US
Dong Seop Kim - Seoul-Si, KR
Mohamed Hilali - Atlanta GA, US

H01L031/00

136261000, 136252000

Devices, solar cell structures, and methods of fabrication thereof, are disclosed. Briefly described, one exemplary embodiment of the device, among others, includes: a co-fired p-type silicon substrate, wherein the bulk lifetime is about to μs; an n layer formed on the top-side of the p-silicon substrate; a silicon nitride anti-reflective (AR) layer positioned on the top-side of the n layer; a plurality of Ag contacts positioned on portions of the silicon nitride AR layer, wherein the Ag contacts are in electronic communication with the n-type emitter layer; an uniform Al back-surface field (BSF or p) layer positioned on the back-side of the p-silicon substrate on the opposite side of the p-type silicon substrate as the n layer; and an Al contact layer positioned on the back-side of the Al BSF layer. The device has a fill factor (FF) of about to , an open circuit voltage (V) of about to mV, and a short circuit current (J) of about to mA/cm.