Resumes
Resumes

Senior Financial Analyst At Mcneilus Truck And Manufacturing, Inc.
View pagePosition:
Senior Financial Analyst at McNeilus Truck and Manufacturing, Inc.
Location:
Rochester, Minnesota
Industry:
Transportation/Trucking/Railroad
Work:
McNeilus Truck and Manufacturing, Inc. - Dodge Center, MN since Aug 2010
Senior Financial Analyst
Personal Communication Systems, Inc 2010 - 2010
Management Consultant
Wake Forest University Aug 2008 - May 2010
2010 MBA Graduate
Luxfer Gas Cylinders May 2009 - Aug 2009
Summer Intern
SAP Labs Feb 2005 - Jun 2008
Development Lead
Senior Financial Analyst
Personal Communication Systems, Inc 2010 - 2010
Management Consultant
Wake Forest University Aug 2008 - May 2010
2010 MBA Graduate
Luxfer Gas Cylinders May 2009 - Aug 2009
Summer Intern
SAP Labs Feb 2005 - Jun 2008
Development Lead
Education:
Wake Forest University - Babcock Graduate School of Management 2008 - 2010
MBA, Strategy/Consulting and Process Improvement Malaviya National Institute of Technology 1999 - 2003
B. Tech., Computer Science SPSEC 1985 - 1999
MBA, Strategy/Consulting and Process Improvement Malaviya National Institute of Technology 1999 - 2003
B. Tech., Computer Science SPSEC 1985 - 1999
Skills:
Project Management
Financial Analysis
Cross-functional Team Leadership
Six Sigma
Supply Chain Management
ERP
Process Improvement
SAP
Program Management
Business Process
Management
Financial Analysis
Cross-functional Team Leadership
Six Sigma
Supply Chain Management
ERP
Process Improvement
SAP
Program Management
Business Process
Management
Languages:
English
Hindi
Hindi
Certifications:
Six Sigma Green Belt, APICS

Sr. Staff Ic Design Engineer At Broadcom
View pagePosition:
Sr. Staff IC Design Engineer at Broadcom
Location:
Orange County, California Area
Industry:
Semiconductors
Work:
Broadcom since Apr 2010
Sr. Staff IC Design Engineer
Conexant Nov 2007 - Apr 2010
Sr. ASIC Design Engineer
Conexant Jan 2006 - Nov 2007
Electronic Design Engineer
New Jersey Inst of Tech Aug 2005 - Dec 2005
Research Assistant
New Jersey Inst. of Tech Aug 2005 - Sep 2005
Tutor VLSI Laboratory
Sr. Staff IC Design Engineer
Conexant Nov 2007 - Apr 2010
Sr. ASIC Design Engineer
Conexant Jan 2006 - Nov 2007
Electronic Design Engineer
New Jersey Inst of Tech Aug 2005 - Dec 2005
Research Assistant
New Jersey Inst. of Tech Aug 2005 - Sep 2005
Tutor VLSI Laboratory
Skills:
Logic Synthesis
Timing Closure
ASIC
Static Timing Analysis
SoC
Physical Design
Formal Verification
Timing Closure
ASIC
Static Timing Analysis
SoC
Physical Design
Formal Verification