Allen Chen

6928080, Aug 9, 2005

Jun 28, 2001

09/896091

Allen Peilen Chen - Cupertino CA, US

Intel Corporation - Santa Clara CA

H04L012/28

3703956, 370509

Transporting a variable length AAL CPS packet over a non-ATM-specific bus includes determining a variable length AAL CPS packet and transmitting the variable length AAL CPS packet over a non-ATM-specific bus. A first part of the variable length AAL CPS packet is received and a length of the variable length AAL CPS packet is determined and then used to determine synchronization information. Reception of the variable length AAL CPS packet continues, and the synchronization information is used to determine that reception of the variable length AAL CPS packet is complete.

7551554, Jun 23, 2009

Nov 29, 2000

09/727393

Allen P. Chen - Cupertino CA, US
Jayakumar Natarajan - Fremont CA, US
Siddharth C. Sheth - San Jose CA, US

Intel Corporation - Santa Clara CA

H04L 12/56
G06F 15/16

370229, 709236

A programmable intra-packet switching method includes a port polling process which polls, in a systematic fashion, data ports connected to a network to determine which port, if any, contains a data packet available for processing. A packet fragmentation process fragments the available data packet into at least one data cell having a defined size, wherein this fragmentation continues until a user-defined number of cells are generated.

20020103925, Aug 1, 2002

Dec 6, 2000

09/732329

Siddharth Sheth - San Jose CA, US
Allen Chen - San Jose CA, US

G06F015/16

709/236000

A method and an apparatus of utilizing a dynamically modifiable combination of fields in a header of an internet protocol version 4 (hereinafter IPv4) packet to classify the IPv4 packet are disclosed. In one embodiment, the apparatus includes a transceiver module and a lookup module. The lookup module is coupled to an external processor via an external processor interface, an external content adjustable memory and the transceiver module. The lookup module also contains a processing core that performs the IPv4 packet classification based on information from the external processor and information stored in the external content adjustable memory.

20040236674, Nov 25, 2004

May 23, 2003

10/445139

Allen Chen - Cupertino CA, US
Roland Oberdorfer - Mountain View CA, US

G06F017/60

705/038000

A method of real-time credit authorization for a plurality of e-commerce transactions. The method includes, in a credit authorization application running on a back-end business processing computer, receiving credit information related to a transaction provided by another computer having an e-commerce application. The method further includes opening an instance of a credit authorization module in the back-end system, processing the credit information in the module, and returning a credit authorization responsive to the credit information to the another computer system. The method may further include the receiving another instance of credit information related to a transaction, opening another instance of the credit authorization module in the back-end system, processing the another instance of credit information in the another module, and returning a credit authorization responsive to the another instance of credit information. The method is scalable and allows a plurality of instances of credit information to be processed simultaneously.

50476726, Sep 10, 1991

Mar 31, 1989

7/332257

Rohit L. Bhuva - Plano TX
Walter C. Bonneau - Peoria AZ
Robert L. Gruebel - Plano TX
Robert A. Helmick - Allen TX
Allen Y. Chen - Plano TX

Texas Instruments Incorporated - Dallas TX

H03K 190175
H03K 1920
H03K 1716
G06F 738

307475

A circuit (90) converts a true ECL signal to a true TTL signal. The circuit includes a differential circuit (180) that receives an ECL signal having high and low values. The differential circuit produces a differential signal therefrom that has a high value in response to one of the high and low values of the true ECL signal, and a low value in response to the other of the high and low values of the true ECL signal. A first translator circuit (36, 64) has an input (32) coupled to the differential circuit (180). The first translator circuit (36, 64) transmits a true low TTL output (56) signal having a voltage level referenced to the voltage level of a TTL low supply voltage in response to receiving a high value of the differential signal. A second translator circuit (46, 52) has an input (38) and is coupled to a TTL high supply voltage and the output (56). An input signal appearing on the input (38) of the second translator circuit has a voltage level related to the voltage level of the differential signal (32).

47275146, Feb 23, 1988

Feb 11, 1986

6/828469

Rohit L. Bhuva - Plano TX
Allen Y. Chen - Plano TX

Texas Instruments Incorporated - Dallas TX

G11C 1700

365104

A programmable memory includes a memory matrix (34) with a row decode circuit (36) and a column decode circuit (48) operable in the program mode to select one of the memory elements in the memory matrix (34). A current boost circuit (50) is operable to provide increased current to the selected cell such that selection of the cell opens the fuse associated therewith to change the logic state. The pins associated with the column and row addresses have multiple mode functions such that in the normal operating mode they can be assigned other tasks and in the programming mode are utilized primarily for addressing of the memory cells.

20230104324, Apr 6, 2023

Dec 7, 2022

18/076820

- Menlo Park CA, US
Allen S.L. Chen - San Francisco CA, US
Brian Kirchoff - Redwood City CA, US

G06F 16/13
G06F 16/248

Example file management systems and methods are described. In one implementation, a system detects a user entry in a document. The system then retrieves knowledge relevant to the user entry. The system also presents the knowledge to a user.

20210109892, Apr 15, 2021

Dec 18, 2020

17/127900

- San Mateo CA, US
Allen S.L. Chen - San Francisco CA, US
Brian Kirchoff - Redwood City CA, US

G06F 16/13
G06F 16/248

Example file management systems and methods are described. In one implementation, a system detects a user entry in a document. The system then retrieves knowledge relevant to the user entry. The system also presents the knowledge to a user.